From b10ac20446019c7df77e51a30ed902b87fad8ec3 Mon Sep 17 00:00:00 2001 From: Yongbok Kim Date: Sat, 1 Nov 2014 05:28:36 +0000 Subject: target-mips: add MSA exceptions add MSA exceptions Reviewed-by: James Hogan Signed-off-by: Yongbok Kim Signed-off-by: Leon Alrae --- target-mips/helper.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'target-mips/helper.c') diff --git a/target-mips/helper.c b/target-mips/helper.c index c92b25c..3a93c20 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -426,6 +426,8 @@ static const char * const excp_names[EXCP_LAST + 1] = { [EXCP_CACHE] = "cache error", [EXCP_TLBXI] = "TLB execute-inhibit", [EXCP_TLBRI] = "TLB read-inhibit", + [EXCP_MSADIS] = "MSA disabled", + [EXCP_MSAFPE] = "MSA floating point", }; target_ulong exception_resume_pc (CPUMIPSState *env) @@ -667,6 +669,10 @@ void mips_cpu_do_interrupt(CPUState *cs) cause = 13; update_badinstr = 1; goto set_EPC; + case EXCP_MSAFPE: + cause = 14; + update_badinstr = 1; + goto set_EPC; case EXCP_FPE: cause = 15; update_badinstr = 1; @@ -681,6 +687,10 @@ void mips_cpu_do_interrupt(CPUState *cs) case EXCP_TLBXI: cause = 20; goto set_EPC; + case EXCP_MSADIS: + cause = 21; + update_badinstr = 1; + goto set_EPC; case EXCP_MDMX: cause = 22; goto set_EPC; -- cgit v1.1