From 3aa80988430f41847e1b78d165440ac03503b6d0 Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" Date: Thu, 3 Sep 2009 22:28:21 +0200 Subject: microblaze: Compute masks for alignment checks at translation time. Thanks to Blue Swirl for reporting. Signed-off-by: Edgar E. Iglesias --- target-microblaze/op_helper.c | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-) (limited to 'target-microblaze/op_helper.c') diff --git a/target-microblaze/op_helper.c b/target-microblaze/op_helper.c index 2cc4ced..89dbc0c 100644 --- a/target-microblaze/op_helper.c +++ b/target-microblaze/op_helper.c @@ -206,27 +206,18 @@ uint32_t helper_pcmpbf(uint32_t a, uint32_t b) return 0; } -void helper_memalign(uint32_t addr, uint32_t dr, uint32_t wr, uint32_t size) +void helper_memalign(uint32_t addr, uint32_t dr, uint32_t wr, uint32_t mask) { - uint32_t mask; - - switch (size) { - case 4: mask = 3; break; - case 2: mask = 1; break; - default: - case 1: mask = 0; break; - } - if (addr & mask) { - qemu_log("unaligned access addr=%x size=%d, wr=%d\n", - addr, size, wr); + qemu_log("unaligned access addr=%x mask=%x, wr=%d\n", + addr, mask, wr); if (!(env->sregs[SR_MSR] & MSR_EE)) { return; } env->sregs[SR_ESR] = ESR_EC_UNALIGNED_DATA | (wr << 10) \ | (dr & 31) << 5; - if (size == 4) { + if (mask == 3) { env->sregs[SR_ESR] |= 1 << 11; } helper_raise_exception(EXCP_HW_EXCP); -- cgit v1.1