From de431a655a7560d834e1187d6b30cb6b1946e90c Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Tue, 27 May 2014 12:31:28 +0200 Subject: target-i386: support long addresses for 4MB pages (PSE-36) 4MB pages can use 40-bit addresses by putting the higher 8 bits in bits 20-13 of the PDE. Bit 21 is reserved. Signed-off-by: Paolo Bonzini --- target-i386/helper.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'target-i386/helper.c') diff --git a/target-i386/helper.c b/target-i386/helper.c index 94081e8..2b917ad 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -672,8 +672,13 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) { page_size = 4096 * 1024; pte_addr = pde_addr; - pte = pde; - goto do_check_protect; + + /* Bits 20-13 provide bits 39-32 of the address, bit 21 is reserved. + * Leave bits 20-13 in place for setting accessed/dirty bits below. + */ + pte = pde | ((pde & 0x1fe000) << (32 - 13)); + rsvd_mask = 0x200000; + goto do_check_protect_pse36; } if (!(pde & PG_ACCESSED_MASK)) { @@ -696,6 +701,7 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, do_check_protect: rsvd_mask |= (page_size - 1) & PG_ADDRESS_MASK & ~PG_PSE_PAT_MASK; +do_check_protect_pse36: if (pte & rsvd_mask) { goto do_fault_rsvd; } @@ -882,7 +888,7 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) if (!(pde & PG_PRESENT_MASK)) return -1; if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) { - pte = pde & ~0x003ff000; /* align to 4MB */ + pte = pde | ((pde & 0x1fe000) << (32 - 13)); page_size = 4096 * 1024; } else { /* page directory entry */ -- cgit v1.1