From 16a906fd6ebbe894d8545ba6168cabea5ef49b1d Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Fri, 12 Sep 2014 14:06:49 +0100 Subject: target-arm: Set DBGDSCR.MOE for debug exceptions taken to AArch32 For debug exceptions taken to AArch32 we have to set the DBGDSCR.MOE (Method Of Entry) bits; we can identify the kind of debug exception from the information in exception.syndrome. Signed-off-by: Peter Maydell --- target-arm/helper.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'target-arm') diff --git a/target-arm/helper.c b/target-arm/helper.c index b0d2424..30d8e60 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3629,11 +3629,37 @@ void arm_cpu_do_interrupt(CPUState *cs) uint32_t mask; int new_mode; uint32_t offset; + uint32_t moe; assert(!IS_M(env)); arm_log_exception(cs->exception_index); + /* If this is a debug exception we must update the DBGDSCR.MOE bits */ + switch (env->exception.syndrome >> ARM_EL_EC_SHIFT) { + case EC_BREAKPOINT: + case EC_BREAKPOINT_SAME_EL: + moe = 1; + break; + case EC_WATCHPOINT: + case EC_WATCHPOINT_SAME_EL: + moe = 10; + break; + case EC_AA32_BKPT: + moe = 3; + break; + case EC_VECTORCATCH: + moe = 5; + break; + default: + moe = 0; + break; + } + + if (moe) { + env->cp15.mdscr_el1 = deposit64(env->cp15.mdscr_el1, 2, 4, moe); + } + /* TODO: Vectored interrupt controller. */ switch (cs->exception_index) { case EXCP_UDEF: -- cgit v1.1