From 30b05bba1122c13206d85d3704e86ff30cc09750 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Wed, 20 Jun 2012 11:57:22 +0000 Subject: target-arm: Move block cache ops to new cp15 framework Move the v6 optional block cache ops to the new cp15 framework. This includes only providing them on the CPUs which implemented them, rather than the previous blunderbuss approach of making all MCRR instructions on all CPUs act as NOPs. Signed-off-by: Peter Maydell --- target-arm/translate.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'target-arm/translate.c') diff --git a/target-arm/translate.c b/target-arm/translate.c index f4e9435..fcdc9d3 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -2451,12 +2451,7 @@ static int disas_cp15_insn(CPUARMState *env, DisasContext *s, uint32_t insn) return 1; if ((insn & (1 << 25)) == 0) { - if (insn & (1 << 20)) { - /* mrrc */ - return 1; - } - /* mcrr. Used for block cache operations, so implement as no-op. */ - return 0; + return 1; } if ((insn & (1 << 4)) == 0) { /* cdp */ -- cgit v1.1