From 2e23213f26fc747b3a4de3c87906bfd3399e95fa Mon Sep 17 00:00:00 2001 From: balrog Date: Wed, 1 Aug 2007 02:31:54 +0000 Subject: Special-case iWMMXt register transfer insns, which are in ARM LDC2/STC2 class. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3107 c046a42c-6fe2-441c-8c8c-71466251a162 --- target-arm/helper.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'target-arm/helper.c') diff --git a/target-arm/helper.c b/target-arm/helper.c index 8132d0c..f1b170d 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -838,9 +838,11 @@ void helper_set_cp15(CPUState *env, uint32_t insn, uint32_t val) case 15: /* Implementation specific. */ if (arm_feature(env, ARM_FEATURE_XSCALE)) { if (op2 == 0 && crm == 1) { - /* Changes cp0 to cp13 behavior, so needs a TB flush. */ - tb_flush(env); - env->cp15.c15_cpar = (val & 0x3fff) | 2; + if (env->cp15.c15_cpar != (val & 0x3fff)) { + /* Changes cp0 to cp13 behavior, so needs a TB flush. */ + tb_flush(env); + env->cp15.c15_cpar = val & 0x3fff; + } break; } goto bad_reg; -- cgit v1.1