From b7bcbe9524c05d5134136cce2d5d2a09c09a4f83 Mon Sep 17 00:00:00 2001 From: bellard Date: Tue, 22 Feb 2005 19:27:29 +0000 Subject: ARM VFP support (Paul Brook) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1309 c046a42c-6fe2-441c-8c8c-71466251a162 --- target-arm/exec.h | 32 ++++++++++++++++++++++++++++---- 1 file changed, 28 insertions(+), 4 deletions(-) (limited to 'target-arm/exec.h') diff --git a/target-arm/exec.h b/target-arm/exec.h index e17302e..64fce71 100644 --- a/target-arm/exec.h +++ b/target-arm/exec.h @@ -24,13 +24,16 @@ register uint32_t T0 asm(AREG1); register uint32_t T1 asm(AREG2); register uint32_t T2 asm(AREG3); +/* TODO: Put these in FP regs on targets that have such things. */ +/* It is ok for FT0s and FT0d to overlap. Likewise FT1s and FT1d. */ +#define FT0s env->vfp.tmp0s +#define FT1s env->vfp.tmp1s +#define FT0d env->vfp.tmp0d +#define FT1d env->vfp.tmp1d + #include "cpu.h" #include "exec-all.h" -void cpu_lock(void); -void cpu_unlock(void); -void cpu_loop_exit(void); - /* Implemented CPSR bits. */ #define CACHED_CPSR_BITS 0xf8000000 static inline int compute_cpsr(void) @@ -51,3 +54,24 @@ static inline void regs_to_env(void) int cpu_arm_handle_mmu_fault (CPUState *env, target_ulong address, int rw, int is_user, int is_softmmu); + +/* In op_helper.c */ + +void cpu_lock(void); +void cpu_unlock(void); +void cpu_loop_exit(void); + +void raise_exception(int); + +void do_vfp_abss(void); +void do_vfp_absd(void); +void do_vfp_negs(void); +void do_vfp_negd(void); +void do_vfp_sqrts(void); +void do_vfp_sqrtd(void); +void do_vfp_cmps(void); +void do_vfp_cmpd(void); +void do_vfp_cmpes(void); +void do_vfp_cmped(void); +void do_vfp_set_fpscr(void); +void do_vfp_get_fpscr(void); -- cgit v1.1