From 3f3373166227b13e762e20d2fb51eadfa6a2d653 Mon Sep 17 00:00:00 2001 From: bellard Date: Wed, 20 Aug 2003 23:02:09 +0000 Subject: pop ss, mov ss, x and sti disable irqs for the next instruction - began dispatch optimization by adding new x86 cpu 'hidden' flags git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@372 c046a42c-6fe2-441c-8c8c-71466251a162 --- softmmu_template.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'softmmu_template.h') diff --git a/softmmu_template.h b/softmmu_template.h index c36e25a..765e913 100644 --- a/softmmu_template.h +++ b/softmmu_template.h @@ -90,7 +90,7 @@ DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), _mmu)(unsigned long addr) /* test if there is match for unaligned or IO access */ /* XXX: could done more in memory macro in a non portable way */ - is_user = (env->cpl == 3); + is_user = ((env->hflags & HF_CPL_MASK) == 3); index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); redo: tlb_addr = env->tlb_read[is_user][index].address; @@ -126,7 +126,7 @@ static DATA_TYPE glue(slow_ld, SUFFIX)(unsigned long addr, void *retaddr) int is_user, index, shift; unsigned long physaddr, tlb_addr, addr1, addr2; - is_user = (env->cpl == 3); + is_user = ((env->hflags & HF_CPL_MASK) == 3); index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); redo: tlb_addr = env->tlb_read[is_user][index].address; @@ -169,7 +169,7 @@ void REGPARM(2) glue(glue(__st, SUFFIX), _mmu)(unsigned long addr, DATA_TYPE val void *retaddr; int is_user, index; - is_user = (env->cpl == 3); + is_user = ((env->hflags & HF_CPL_MASK) == 3); index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); redo: tlb_addr = env->tlb_write[is_user][index].address; @@ -203,7 +203,7 @@ static void glue(slow_st, SUFFIX)(unsigned long addr, DATA_TYPE val, unsigned long physaddr, tlb_addr; int is_user, index, i; - is_user = (env->cpl == 3); + is_user = ((env->hflags & HF_CPL_MASK) == 3); index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); redo: tlb_addr = env->tlb_write[is_user][index].address; -- cgit v1.1