From f1ecb913d81199758383b8cbc15f4eb435b91753 Mon Sep 17 00:00:00 2001 From: Ard Biesheuvel Date: Mon, 9 Jun 2014 15:43:23 +0100 Subject: target-arm: add support for v8 SHA1 and SHA256 instructions This adds support for the SHA1 and SHA256 instructions that are available on some v8 implementations of Aarch32. Signed-off-by: Ard Biesheuvel Signed-off-by: Peter Maydell Message-id: 1401386724-26529-2-git-send-email-peter.maydell@linaro.org [PMM: * rebase * fix bad indent * add a missing UNDEF check for Q!=1 in the 3-reg SHA1/SHA256 case * use g_assert_not_reached() * don't re-extract bit 6 for the 2-reg-misc encodings * set the ELF HWCAP2 bits for the new features ] Signed-off-by: Peter Maydell --- linux-user/elfload.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'linux-user') diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 995f999..9bda262 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -468,6 +468,8 @@ static uint32_t get_elf_hwcap2(void) uint32_t hwcaps = 0; GET_FEATURE(ARM_FEATURE_V8_AES, ARM_HWCAP2_ARM_AES); + GET_FEATURE(ARM_FEATURE_V8_SHA1, ARM_HWCAP2_ARM_SHA1); + GET_FEATURE(ARM_FEATURE_V8_SHA256, ARM_HWCAP2_ARM_SHA2); GET_FEATURE(ARM_FEATURE_CRC, ARM_HWCAP2_ARM_CRC32); return hwcaps; } -- cgit v1.1