From becb66673ec30cb604926d247ab9449a60ad8b11 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Mon, 28 Sep 2015 14:00:18 +0200 Subject: target-i386: add ABM to Haswell* and Broadwell* CPU models ABM is only implemented as a single instruction set by AMD; all AMD processors support both instructions or neither. Intel considers POPCNT as part of SSE4.2, and LZCNT as part of BMI1, but Intel also uses AMD's ABM flag to indicate support for both POPCNT and LZCNT. It has to be added to Haswell and Broadwell because Haswell, by adding LZCNT, has completed the ABM. Tested with "qemu-kvm -cpu Haswell-noTSX,enforce" (and also with older machine types) on an Haswell-EP machine. Signed-off-by: Paolo Bonzini Reviewed-by: Eduardo Habkost Signed-off-by: Eduardo Habkost --- include/hw/i386/pc.h | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index c13e91d..8662a29 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -298,7 +298,27 @@ int e820_get_num_entries(void); bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); #define PC_COMPAT_2_4 \ - HW_COMPAT_2_4 + HW_COMPAT_2_4 \ + {\ + .driver = "Haswell-" TYPE_X86_CPU,\ + .property = "abm",\ + .value = "off",\ + },\ + {\ + .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ + .property = "abm",\ + .value = "off",\ + },\ + {\ + .driver = "Broadwell-" TYPE_X86_CPU,\ + .property = "abm",\ + .value = "off",\ + },\ + {\ + .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ + .property = "abm",\ + .value = "off",\ + }, #define PC_COMPAT_2_3 \ PC_COMPAT_2_4 \ -- cgit v1.1