From 42d8a3cf960659069bd2b2d9c443dafd7585607f Mon Sep 17 00:00:00 2001 From: Julien Grall Date: Wed, 19 Sep 2012 12:50:03 +0100 Subject: hw/apm.c: Replace register_ioport_* MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace all register_ioport_*() with a MemoryRegion. This permits to use the new Memory stuff like listeners. Moreover, the PCI device is added as an argument for apm_init(), so we can register IO inside the PCI IO address space. Signed-off-by: Julien Grall Acked-by: Avi Kivity [AF: Rebased onto hwaddr and q35] Signed-off-by: Andreas Färber --- hw/acpi_piix4.c | 2 +- hw/apm.c | 23 ++++++++++++++++++----- hw/apm.h | 5 ++++- hw/lpc_ich9.c | 2 +- hw/vt82c686.c | 2 +- 5 files changed, 25 insertions(+), 9 deletions(-) (limited to 'hw') diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 519269a..dbddde1 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -438,7 +438,7 @@ static int piix4_pm_initfn(PCIDevice *dev) pci_conf[0x3d] = 0x01; // interrupt pin 1 /* APM */ - apm_init(&s->apm, apm_ctrl_changed, s); + apm_init(dev, &s->apm, apm_ctrl_changed, s); register_ioport_write(ACPI_DBG_IO_ADDR, 4, 4, acpi_dbg_writel, s); diff --git a/hw/apm.c b/hw/apm.c index 2aead52..e988ad9 100644 --- a/hw/apm.c +++ b/hw/apm.c @@ -22,6 +22,7 @@ #include "apm.h" #include "hw.h" +#include "pci.h" //#define DEBUG @@ -35,7 +36,8 @@ #define APM_CNT_IOPORT 0xb2 #define APM_STS_IOPORT 0xb3 -static void apm_ioport_writeb(void *opaque, uint32_t addr, uint32_t val) +static void apm_ioport_writeb(void *opaque, hwaddr addr, uint64_t val, + unsigned size) { APMState *apm = opaque; addr &= 1; @@ -51,7 +53,7 @@ static void apm_ioport_writeb(void *opaque, uint32_t addr, uint32_t val) } } -static uint32_t apm_ioport_readb(void *opaque, uint32_t addr) +static uint64_t apm_ioport_readb(void *opaque, hwaddr addr, unsigned size) { APMState *apm = opaque; uint32_t val; @@ -78,12 +80,23 @@ const VMStateDescription vmstate_apm = { } }; -void apm_init(APMState *apm, apm_ctrl_changed_t callback, void *arg) +static const MemoryRegionOps apm_ops = { + .read = apm_ioport_readb, + .write = apm_ioport_writeb, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, +}; + +void apm_init(PCIDevice *dev, APMState *apm, apm_ctrl_changed_t callback, + void *arg) { apm->callback = callback; apm->arg = arg; /* ioport 0xb2, 0xb3 */ - register_ioport_write(APM_CNT_IOPORT, 2, 1, apm_ioport_writeb, apm); - register_ioport_read(APM_CNT_IOPORT, 2, 1, apm_ioport_readb, apm); + memory_region_init_io(&apm->io, &apm_ops, apm, "apm-io", 2); + memory_region_add_subregion(pci_address_space_io(dev), APM_CNT_IOPORT, + &apm->io); } diff --git a/hw/apm.h b/hw/apm.h index f7c741e..5431b6d 100644 --- a/hw/apm.h +++ b/hw/apm.h @@ -4,6 +4,7 @@ #include #include "qemu-common.h" #include "hw.h" +#include "memory.h" typedef void (*apm_ctrl_changed_t)(uint32_t val, void *arg); @@ -13,9 +14,11 @@ typedef struct APMState { apm_ctrl_changed_t callback; void *arg; + MemoryRegion io; } APMState; -void apm_init(APMState *s, apm_ctrl_changed_t callback, void *arg); +void apm_init(PCIDevice *dev, APMState *s, apm_ctrl_changed_t callback, + void *arg); extern const VMStateDescription vmstate_apm; diff --git a/hw/lpc_ich9.c b/hw/lpc_ich9.c index 2fc83a4..7de5427 100644 --- a/hw/lpc_ich9.c +++ b/hw/lpc_ich9.c @@ -472,7 +472,7 @@ static int ich9_lpc_initfn(PCIDevice *d) lpc->isa_bus = isa_bus; ich9_cc_init(lpc); - apm_init(&lpc->apm, ich9_apm_ctrl_changed, lpc); + apm_init(d, &lpc->apm, ich9_apm_ctrl_changed, lpc); return 0; } diff --git a/hw/vt82c686.c b/hw/vt82c686.c index 5d7c00c..7f11dbe 100644 --- a/hw/vt82c686.c +++ b/hw/vt82c686.c @@ -427,7 +427,7 @@ static int vt82c686b_pm_initfn(PCIDevice *dev) register_ioport_write(s->smb_io_base, 0xf, 1, smb_ioport_writeb, &s->smb); register_ioport_read(s->smb_io_base, 0xf, 1, smb_ioport_readb, &s->smb); - apm_init(&s->apm, NULL, s); + apm_init(dev, &s->apm, NULL, s); acpi_pm_tmr_init(&s->ar, pm_tmr_timer); acpi_pm1_cnt_init(&s->ar); -- cgit v1.1