From 12f7fb60863f5aae44fa7a6c1f52cbecd29d4e9c Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Fri, 25 Apr 2014 08:39:47 -0700 Subject: xilinx_intc: Fix writes into MER register The MER register only has two valid bits. This is now used by the linux kernel to auto-detect endianness, and causes Linux 3.15-rc1 and later to hang when run under qemu-microblaze. Mask valid bits before writing the register to solve the problem. Signed-off-by: Guenter Roeck Reviewed-by: Edgar E. Iglesias [Edgar: Untabified] Signed-off-by: Edgar E. Iglesias --- hw/intc/xilinx_intc.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'hw/intc/xilinx_intc.c') diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c index 1b228ff..c3682f1 100644 --- a/hw/intc/xilinx_intc.c +++ b/hw/intc/xilinx_intc.c @@ -121,6 +121,9 @@ pic_write(void *opaque, hwaddr addr, case R_CIE: p->regs[R_IER] &= ~value; /* Atomic clear ie. */ break; + case R_MER: + p->regs[R_MER] = value & 0x3; + break; case R_ISR: if ((p->regs[R_MER] & 2)) { break; -- cgit v1.1