From 8150847061f8d2606101bfff77cc6ec86b081ab0 Mon Sep 17 00:00:00 2001 From: Fabian Aggeler Date: Tue, 12 May 2015 11:57:17 +0100 Subject: hw/intc/arm_gic: Restrict priority view GICs with Security Extensions restrict the non-secure view of the interrupt priority and priority mask registers. Signed-off-by: Fabian Aggeler Signed-off-by: Greg Bellows Reviewed-by: Edgar E. Iglesias Signed-off-by: Peter Maydell Message-id: 1430502643-25909-11-git-send-email-peter.maydell@linaro.org Message-id: 1429113742-8371-15-git-send-email-greg.bellows@linaro.org [PMM: minor code tweaks; fixed missing masking in gic_set_priority_mask and gic_set_priority] Signed-off-by: Peter Maydell --- hw/intc/gic_internal.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'hw/intc/gic_internal.h') diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h index 81c764c..119fb81 100644 --- a/hw/intc/gic_internal.h +++ b/hw/intc/gic_internal.h @@ -82,7 +82,8 @@ uint32_t gic_acknowledge_irq(GICState *s, int cpu); void gic_complete_irq(GICState *s, int cpu, int irq); void gic_update(GICState *s); void gic_init_irqs_and_distributor(GICState *s); -void gic_set_priority(GICState *s, int cpu, int irq, uint8_t val); +void gic_set_priority(GICState *s, int cpu, int irq, uint8_t val, + MemTxAttrs attrs); static inline bool gic_test_pending(GICState *s, int irq, int cm) { -- cgit v1.1