From af11110bb83166473064389faa27e8c6703b2008 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Thu, 22 Nov 2012 11:34:44 +0100 Subject: apci: switch piix4 to memory api Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 41 ++++++++++++++++++++++++----------------- 1 file changed, 24 insertions(+), 17 deletions(-) (limited to 'hw/acpi_piix4.c') diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 519269a..320e045 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -28,6 +28,7 @@ #include "range.h" #include "ioport.h" #include "fw_cfg.h" +#include "exec-memory.h" //#define DEBUG @@ -55,7 +56,7 @@ struct pci_status { typedef struct PIIX4PMState { PCIDevice dev; - IORange ioport; + MemoryRegion io; ACPIREGS ar; APMState apm; @@ -109,10 +110,10 @@ static void pm_tmr_timer(ACPIREGS *ar) pm_update_sci(s); } -static void pm_ioport_write(IORange *ioport, uint64_t addr, unsigned width, - uint64_t val) +static void pm_ioport_write(void *opaque, hwaddr addr, uint64_t val, + unsigned width) { - PIIX4PMState *s = container_of(ioport, PIIX4PMState, ioport); + PIIX4PMState *s = opaque; if (width != 2) { PIIX4_DPRINTF("PM write port=0x%04x width=%d val=0x%08x\n", @@ -138,10 +139,9 @@ static void pm_ioport_write(IORange *ioport, uint64_t addr, unsigned width, (unsigned int)val); } -static void pm_ioport_read(IORange *ioport, uint64_t addr, unsigned width, - uint64_t *data) +static uint64_t pm_ioport_read(void *opaque, hwaddr addr, unsigned width) { - PIIX4PMState *s = container_of(ioport, PIIX4PMState, ioport); + PIIX4PMState *s = opaque; uint32_t val; switch(addr) { @@ -162,12 +162,17 @@ static void pm_ioport_read(IORange *ioport, uint64_t addr, unsigned width, break; } PIIX4_DPRINTF("PM readw port=0x%04x val=0x%04x\n", (unsigned int)addr, val); - *data = val; + return val; } -static const IORangeOps pm_iorange_ops = { +static const MemoryRegionOps pm_io_ops = { .read = pm_ioport_read, .write = pm_ioport_write, + .valid.min_access_size = 1, + .valid.max_access_size = 4, + .impl.min_access_size = 1, + .impl.max_access_size = 4, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void apm_ctrl_changed(uint32_t val, void *arg) @@ -193,15 +198,13 @@ static void pm_io_space_update(PIIX4PMState *s) { uint32_t pm_io_base; - if (s->dev.config[0x80] & 1) { - pm_io_base = le32_to_cpu(*(uint32_t *)(s->dev.config + 0x40)); - pm_io_base &= 0xffc0; + pm_io_base = le32_to_cpu(*(uint32_t *)(s->dev.config + 0x40)); + pm_io_base &= 0xffc0; - /* XXX: need to improve memory and ioport allocation */ - PIIX4_DPRINTF("PM: mapping to 0x%x\n", pm_io_base); - iorange_init(&s->ioport, &pm_iorange_ops, pm_io_base, 64); - ioport_register(&s->ioport); - } + memory_region_transaction_begin(); + memory_region_set_enabled(&s->io, s->dev.config[0x80] & 1); + memory_region_set_address(&s->io, pm_io_base); + memory_region_transaction_commit(); } static void pm_write_config(PCIDevice *d, @@ -456,6 +459,10 @@ static int piix4_pm_initfn(PCIDevice *dev) register_ioport_write(s->smb_io_base, 64, 1, smb_ioport_writeb, &s->smb); register_ioport_read(s->smb_io_base, 64, 1, smb_ioport_readb, &s->smb); + memory_region_init_io(&s->io, &pm_io_ops, s, "piix4-pm", 64); + memory_region_set_enabled(&s->io, false); + memory_region_add_subregion(get_system_io(), 0, &s->io); + acpi_pm_tmr_init(&s->ar, pm_tmr_timer); acpi_gpe_init(&s->ar, GPE_LEN); -- cgit v1.1 From 77d58b1e47c8d1c661f98f12b47ab519d3561488 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Thu, 22 Nov 2012 12:12:30 +0100 Subject: apci: switch timer to memory api Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'hw/acpi_piix4.c') diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 320e045..75761a0 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -154,9 +154,6 @@ static uint64_t pm_ioport_read(void *opaque, hwaddr addr, unsigned width) case 0x04: val = s->ar.pm1.cnt.cnt; break; - case 0x08: - val = acpi_pm_tmr_get(&s->ar); - break; default: val = 0; break; @@ -463,7 +460,7 @@ static int piix4_pm_initfn(PCIDevice *dev) memory_region_set_enabled(&s->io, false); memory_region_add_subregion(get_system_io(), 0, &s->io); - acpi_pm_tmr_init(&s->ar, pm_tmr_timer); + acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); acpi_gpe_init(&s->ar, GPE_LEN); s->powerdown_notifier.notify = piix4_pm_powerdown_req; -- cgit v1.1 From afafe4bbe0cf7d3318e1ac7b40925561f86a6bd4 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Thu, 22 Nov 2012 13:17:57 +0100 Subject: apci: switch cnt to memory api Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) (limited to 'hw/acpi_piix4.c') diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 75761a0..9d5e346 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -129,9 +129,6 @@ static void pm_ioport_write(void *opaque, hwaddr addr, uint64_t val, acpi_pm1_evt_write_en(&s->ar, val); pm_update_sci(s); break; - case 0x04: - acpi_pm1_cnt_write(&s->ar, val, s->s4_val); - break; default: break; } @@ -151,9 +148,6 @@ static uint64_t pm_ioport_read(void *opaque, hwaddr addr, unsigned width) case 0x02: val = s->ar.pm1.evt.en; break; - case 0x04: - val = s->ar.pm1.cnt.cnt; - break; default: val = 0; break; @@ -461,6 +455,7 @@ static int piix4_pm_initfn(PCIDevice *dev) memory_region_add_subregion(get_system_io(), 0, &s->io); acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); + acpi_pm1_cnt_init(&s->ar, &s->io); acpi_gpe_init(&s->ar, GPE_LEN); s->powerdown_notifier.notify = piix4_pm_powerdown_req; @@ -487,7 +482,6 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, s = DO_UPCAST(PIIX4PMState, dev, dev); s->irq = sci_irq; - acpi_pm1_cnt_init(&s->ar); s->smi_irq = smi_irq; s->kvm_enabled = kvm_enabled; -- cgit v1.1 From b5a7c024d2606e84e0bbe4a0e87d252dfda41479 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Thu, 22 Nov 2012 13:25:10 +0100 Subject: apci: switch evt to memory api Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 18 +----------------- 1 file changed, 1 insertion(+), 17 deletions(-) (limited to 'hw/acpi_piix4.c') diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 9d5e346..d4e28c4 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -113,22 +113,12 @@ static void pm_tmr_timer(ACPIREGS *ar) static void pm_ioport_write(void *opaque, hwaddr addr, uint64_t val, unsigned width) { - PIIX4PMState *s = opaque; - if (width != 2) { PIIX4_DPRINTF("PM write port=0x%04x width=%d val=0x%08x\n", (unsigned)addr, width, (unsigned)val); } switch(addr) { - case 0x00: - acpi_pm1_evt_write_sts(&s->ar, val); - pm_update_sci(s); - break; - case 0x02: - acpi_pm1_evt_write_en(&s->ar, val); - pm_update_sci(s); - break; default: break; } @@ -138,16 +128,9 @@ static void pm_ioport_write(void *opaque, hwaddr addr, uint64_t val, static uint64_t pm_ioport_read(void *opaque, hwaddr addr, unsigned width) { - PIIX4PMState *s = opaque; uint32_t val; switch(addr) { - case 0x00: - val = acpi_pm1_evt_get_sts(&s->ar); - break; - case 0x02: - val = s->ar.pm1.evt.en; - break; default: val = 0; break; @@ -455,6 +438,7 @@ static int piix4_pm_initfn(PCIDevice *dev) memory_region_add_subregion(get_system_io(), 0, &s->io); acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); + acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); acpi_pm1_cnt_init(&s->ar, &s->io); acpi_gpe_init(&s->ar, GPE_LEN); -- cgit v1.1 From ca5d64b4b4fbb01e403f89ec9b399aaa69104b1e Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Thu, 22 Nov 2012 13:27:04 +0100 Subject: acpi: cleanup piix4 memory region Nothing left to do, everything handled by subregions, we can zap the reaw/write handlers now. Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 41 +---------------------------------------- 1 file changed, 1 insertion(+), 40 deletions(-) (limited to 'hw/acpi_piix4.c') diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index d4e28c4..cf8aa3d 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -110,45 +110,6 @@ static void pm_tmr_timer(ACPIREGS *ar) pm_update_sci(s); } -static void pm_ioport_write(void *opaque, hwaddr addr, uint64_t val, - unsigned width) -{ - if (width != 2) { - PIIX4_DPRINTF("PM write port=0x%04x width=%d val=0x%08x\n", - (unsigned)addr, width, (unsigned)val); - } - - switch(addr) { - default: - break; - } - PIIX4_DPRINTF("PM writew port=0x%04x val=0x%04x\n", (unsigned int)addr, - (unsigned int)val); -} - -static uint64_t pm_ioport_read(void *opaque, hwaddr addr, unsigned width) -{ - uint32_t val; - - switch(addr) { - default: - val = 0; - break; - } - PIIX4_DPRINTF("PM readw port=0x%04x val=0x%04x\n", (unsigned int)addr, val); - return val; -} - -static const MemoryRegionOps pm_io_ops = { - .read = pm_ioport_read, - .write = pm_ioport_write, - .valid.min_access_size = 1, - .valid.max_access_size = 4, - .impl.min_access_size = 1, - .impl.max_access_size = 4, - .endianness = DEVICE_LITTLE_ENDIAN, -}; - static void apm_ctrl_changed(uint32_t val, void *arg) { PIIX4PMState *s = arg; @@ -433,7 +394,7 @@ static int piix4_pm_initfn(PCIDevice *dev) register_ioport_write(s->smb_io_base, 64, 1, smb_ioport_writeb, &s->smb); register_ioport_read(s->smb_io_base, 64, 1, smb_ioport_readb, &s->smb); - memory_region_init_io(&s->io, &pm_io_ops, s, "piix4-pm", 64); + memory_region_init(&s->io, "piix4-pm", 64); memory_region_set_enabled(&s->io, false); memory_region_add_subregion(get_system_io(), 0, &s->io); -- cgit v1.1 From 798512e5522685163c8d5fc5093aea19ae9cce06 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Fri, 23 Nov 2012 14:57:01 +0100 Subject: acpi: switch smbus to memory api Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'hw/acpi_piix4.c') diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index cf8aa3d..9e6c97e 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -391,8 +391,8 @@ static int piix4_pm_initfn(PCIDevice *dev) pci_conf[0x90] = s->smb_io_base | 1; pci_conf[0x91] = s->smb_io_base >> 8; pci_conf[0xd2] = 0x09; - register_ioport_write(s->smb_io_base, 64, 1, smb_ioport_writeb, &s->smb); - register_ioport_read(s->smb_io_base, 64, 1, smb_ioport_readb, &s->smb); + pm_smbus_init(&s->dev.qdev, &s->smb); + memory_region_add_subregion(get_system_io(), s->smb_io_base, &s->smb.io); memory_region_init(&s->io, "piix4-pm", 64); memory_region_set_enabled(&s->io, false); @@ -406,7 +406,6 @@ static int piix4_pm_initfn(PCIDevice *dev) s->powerdown_notifier.notify = piix4_pm_powerdown_req; qemu_register_powerdown_notifier(&s->powerdown_notifier); - pm_smbus_init(&s->dev.qdev, &s->smb); s->machine_ready.notify = piix4_pm_machine_ready; qemu_add_machine_init_done_notifier(&s->machine_ready); qemu_register_reset(piix4_reset, s); -- cgit v1.1 From 24fe083de67e0f736c54da4abda05f23ec37c51d Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Fri, 23 Nov 2012 14:58:04 +0100 Subject: acpi: fix piix4 smbus mapping Make write to the smbus base register and enable bit actually work. Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) (limited to 'hw/acpi_piix4.c') diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 9e6c97e..b1d5bf3 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -142,12 +142,29 @@ static void pm_io_space_update(PIIX4PMState *s) memory_region_transaction_commit(); } +static void smbus_io_space_update(PIIX4PMState *s) +{ + s->smb_io_base = le32_to_cpu(*(uint32_t *)(s->dev.config + 0x90)); + s->smb_io_base &= 0xffc0; + + memory_region_transaction_begin(); + memory_region_set_enabled(&s->smb.io, s->dev.config[0xd2] & 1); + memory_region_set_address(&s->smb.io, s->smb_io_base); + memory_region_transaction_commit(); +} + static void pm_write_config(PCIDevice *d, uint32_t address, uint32_t val, int len) { pci_default_write_config(d, address, val, len); - if (range_covers_byte(address, len, 0x80)) + if (range_covers_byte(address, len, 0x80) || + ranges_overlap(address, len, 0x40, 4)) { pm_io_space_update((PIIX4PMState *)d); + } + if (range_covers_byte(address, len, 0xd2) || + ranges_overlap(address, len, 0x90, 4)) { + smbus_io_space_update((PIIX4PMState *)d); + } } static void vmstate_pci_status_pre_save(void *opaque) @@ -392,6 +409,7 @@ static int piix4_pm_initfn(PCIDevice *dev) pci_conf[0x91] = s->smb_io_base >> 8; pci_conf[0xd2] = 0x09; pm_smbus_init(&s->dev.qdev, &s->smb); + memory_region_set_enabled(&s->smb.io, pci_conf[0xd2] & 1); memory_region_add_subregion(get_system_io(), s->smb_io_base, &s->smb.io); memory_region_init(&s->io, "piix4-pm", 64); -- cgit v1.1 From b65b93f24cb84923d2d7d43cf87d40bc88b6bdcd Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Fri, 23 Nov 2012 15:35:13 +0100 Subject: apci: switch piix4 gpe to memory api Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) (limited to 'hw/acpi_piix4.c') diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index b1d5bf3..c1a58d3 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -57,6 +57,7 @@ struct pci_status { typedef struct PIIX4PMState { PCIDevice dev; MemoryRegion io; + MemoryRegion io_gpe; ACPIREGS ar; APMState apm; @@ -500,7 +501,7 @@ static void piix4_pm_register_types(void) type_init(piix4_pm_register_types) -static uint32_t gpe_readb(void *opaque, uint32_t addr) +static uint64_t gpe_readb(void *opaque, hwaddr addr, unsigned width) { PIIX4PMState *s = opaque; uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr); @@ -509,7 +510,8 @@ static uint32_t gpe_readb(void *opaque, uint32_t addr) return val; } -static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val) +static void gpe_writeb(void *opaque, hwaddr addr, uint64_t val, + unsigned width) { PIIX4PMState *s = opaque; @@ -519,6 +521,16 @@ static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val) PIIX4_DPRINTF("gpe write %x <== %d\n", addr, val); } +static const MemoryRegionOps piix4_gpe_ops = { + .read = gpe_readb, + .write = gpe_writeb, + .valid.min_access_size = 1, + .valid.max_access_size = 4, + .impl.min_access_size = 1, + .impl.max_access_size = 1, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + static uint32_t pci_up_read(void *opaque, uint32_t addr) { PIIX4PMState *s = opaque; @@ -567,10 +579,10 @@ static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) { - - register_ioport_write(GPE_BASE, GPE_LEN, 1, gpe_writeb, s); - register_ioport_read(GPE_BASE, GPE_LEN, 1, gpe_readb, s); - acpi_gpe_blk(&s->ar, GPE_BASE); + memory_region_init_io(&s->io_gpe, &piix4_gpe_ops, s, "apci-gpe0", + GPE_LEN); + memory_region_add_subregion(get_system_io(), GPE_BASE, &s->io_gpe); + acpi_gpe_blk(&s->ar, 0); register_ioport_read(PCI_UP_BASE, 4, 4, pci_up_read, s); register_ioport_read(PCI_DOWN_BASE, 4, 4, pci_down_read, s); -- cgit v1.1 From c84649ca66a32aadba20a8202062b02247270ee5 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Fri, 23 Nov 2012 15:37:05 +0100 Subject: acpi: remove acpi_gpe_blk With gpe being switched to memory api this is no longer needed. Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 1 - 1 file changed, 1 deletion(-) (limited to 'hw/acpi_piix4.c') diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index c1a58d3..d2ba56e 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -582,7 +582,6 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) memory_region_init_io(&s->io_gpe, &piix4_gpe_ops, s, "apci-gpe0", GPE_LEN); memory_region_add_subregion(get_system_io(), GPE_BASE, &s->io_gpe); - acpi_gpe_blk(&s->ar, 0); register_ioport_read(PCI_UP_BASE, 4, 4, pci_up_read, s); register_ioport_read(PCI_DOWN_BASE, 4, 4, pci_down_read, s); -- cgit v1.1 From c177684c753a0b1337acebb7dbc6f3f3a9700321 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Fri, 23 Nov 2012 16:03:19 +0100 Subject: apci: switch piix4 pci hotplug to memory api Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 37 +++++++++++++++++++++++++++++-------- 1 file changed, 29 insertions(+), 8 deletions(-) (limited to 'hw/acpi_piix4.c') diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index d2ba56e..263338a 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -42,6 +42,9 @@ #define GPE_BASE 0xafe0 #define GPE_LEN 4 + +#define PCI_HOTPLUG_ADDR 0xae00 +#define PCI_HOTPLUG_SIZE 0x000f #define PCI_UP_BASE 0xae00 #define PCI_DOWN_BASE 0xae04 #define PCI_EJ_BASE 0xae08 @@ -58,6 +61,7 @@ typedef struct PIIX4PMState { PCIDevice dev; MemoryRegion io; MemoryRegion io_gpe; + MemoryRegion io_pci; ACPIREGS ar; APMState apm; @@ -574,6 +578,27 @@ static uint32_t pcirmv_read(void *opaque, uint32_t addr) return s->pci0_hotplug_enable; } +static const MemoryRegionOps piix4_pci_ops = { + .old_portio = (MemoryRegionPortio[]) { + { + .offset = PCI_UP_BASE - PCI_HOTPLUG_ADDR, .len = 4, .size = 4, + .read = pci_up_read, + },{ + .offset = PCI_DOWN_BASE - PCI_HOTPLUG_ADDR, .len = 4, .size = 4, + .read = pci_down_read, + },{ + .offset = PCI_EJ_BASE - PCI_HOTPLUG_ADDR, .len = 4, .size = 4, + .read = pci_features_read, + .write = pciej_write, + },{ + .offset = PCI_RMV_BASE - PCI_HOTPLUG_ADDR, .len = 4, .size = 4, + .read = pcirmv_read, + }, + PORTIO_END_OF_LIST() + }, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, PCIHotplugState state); @@ -583,14 +608,10 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) GPE_LEN); memory_region_add_subregion(get_system_io(), GPE_BASE, &s->io_gpe); - register_ioport_read(PCI_UP_BASE, 4, 4, pci_up_read, s); - register_ioport_read(PCI_DOWN_BASE, 4, 4, pci_down_read, s); - - register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, s); - register_ioport_read(PCI_EJ_BASE, 4, 4, pci_features_read, s); - - register_ioport_read(PCI_RMV_BASE, 4, 4, pcirmv_read, s); - + memory_region_init_io(&s->io_pci, &piix4_pci_ops, s, "apci-pci-hotplug", + PCI_HOTPLUG_SIZE); + memory_region_add_subregion(get_system_io(), PCI_HOTPLUG_ADDR, + &s->io_pci); pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev); } -- cgit v1.1 From 3e43749882c558875f70ac5deda39cdc9797e245 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Tue, 27 Nov 2012 08:24:42 +0100 Subject: acpi: drop debug port I'm pretty sure this isn't needed any more. I think this predates the switch to seabios, and the seabios DSDT table has a DBUG() aml macro which writes stuff to the seabios debug port (0x402). Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 9 --------- 1 file changed, 9 deletions(-) (limited to 'hw/acpi_piix4.c') diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 263338a..b03454e 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -38,8 +38,6 @@ # define PIIX4_DPRINTF(format, ...) do { } while (0) #endif -#define ACPI_DBG_IO_ADDR 0xb044 - #define GPE_BASE 0xafe0 #define GPE_LEN 4 @@ -129,11 +127,6 @@ static void apm_ctrl_changed(uint32_t val, void *arg) } } -static void acpi_dbg_writel(void *opaque, uint32_t addr, uint32_t val) -{ - PIIX4_DPRINTF("ACPI: DBG: 0x%08x\n", val); -} - static void pm_io_space_update(PIIX4PMState *s) { uint32_t pm_io_base; @@ -400,8 +393,6 @@ static int piix4_pm_initfn(PCIDevice *dev) /* APM */ apm_init(&s->apm, apm_ctrl_changed, s); - register_ioport_write(ACPI_DBG_IO_ADDR, 4, 4, acpi_dbg_writel, s); - if (s->kvm_enabled) { /* Mark SMM as already inited to prevent SMM from running. KVM does not * support SMM mode. */ -- cgit v1.1