From 355bf2e5bac7be1b7516e88307f5507e74e8ce79 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Thu, 23 Feb 2012 13:45:16 +0100 Subject: acpi: add ACPIREGS All those acpi structs are not independent from each other. Various acpi functions expecting multiple acpi structs passed in are a clean indicator for that ;) So this patch bundles all acpi structs in the new ACPIREGS struct, then use it everythere pass around acpi state. Signed-off-by: Gerd Hoffmann Signed-off-by: Anthony Liguori --- hw/acpi_piix4.c | 68 +++++++++++++++++++++++++++------------------------------ 1 file changed, 32 insertions(+), 36 deletions(-) (limited to 'hw/acpi_piix4.c') diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index d959f49..68d5eab 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -54,13 +54,10 @@ struct pci_status { typedef struct PIIX4PMState { PCIDevice dev; IORange ioport; - ACPIPM1EVT pm1a; - ACPIPM1CNT pm1_cnt; + ACPIREGS ar; APMState apm; - ACPIPMTimer tmr; - PMSMBus smb; uint32_t smb_io_base; @@ -70,7 +67,6 @@ typedef struct PIIX4PMState { Notifier machine_ready; /* for pci hotplug */ - ACPIGPE gpe; struct pci_status pci0_status; uint32_t pci0_hotplug_enable; } PIIX4PMState; @@ -84,23 +80,24 @@ static void pm_update_sci(PIIX4PMState *s) { int sci_level, pmsts; - pmsts = acpi_pm1_evt_get_sts(&s->pm1a, s->tmr.overflow_time); - sci_level = (((pmsts & s->pm1a.en) & + pmsts = acpi_pm1_evt_get_sts(&s->ar, s->ar.tmr.overflow_time); + sci_level = (((pmsts & s->ar.pm1.evt.en) & (ACPI_BITMASK_RT_CLOCK_ENABLE | ACPI_BITMASK_POWER_BUTTON_ENABLE | ACPI_BITMASK_GLOBAL_LOCK_ENABLE | ACPI_BITMASK_TIMER_ENABLE)) != 0) || - (((s->gpe.sts[0] & s->gpe.en[0]) & PIIX4_PCI_HOTPLUG_STATUS) != 0); + (((s->ar.gpe.sts[0] & s->ar.gpe.en[0]) + & PIIX4_PCI_HOTPLUG_STATUS) != 0); qemu_set_irq(s->irq, sci_level); /* schedule a timer interruption if needed */ - acpi_pm_tmr_update(&s->tmr, (s->pm1a.en & ACPI_BITMASK_TIMER_ENABLE) && + acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && !(pmsts & ACPI_BITMASK_TIMER_STATUS)); } -static void pm_tmr_timer(ACPIPMTimer *tmr) +static void pm_tmr_timer(ACPIREGS *ar) { - PIIX4PMState *s = container_of(tmr, PIIX4PMState, tmr); + PIIX4PMState *s = container_of(ar, PIIX4PMState, ar); pm_update_sci(s); } @@ -116,15 +113,15 @@ static void pm_ioport_write(IORange *ioport, uint64_t addr, unsigned width, switch(addr) { case 0x00: - acpi_pm1_evt_write_sts(&s->pm1a, &s->tmr, val); + acpi_pm1_evt_write_sts(&s->ar, val); pm_update_sci(s); break; case 0x02: - s->pm1a.en = val; + s->ar.pm1.evt.en = val; pm_update_sci(s); break; case 0x04: - acpi_pm1_cnt_write(&s->pm1a, &s->pm1_cnt, val); + acpi_pm1_cnt_write(&s->ar, val); break; default: break; @@ -141,16 +138,16 @@ static void pm_ioport_read(IORange *ioport, uint64_t addr, unsigned width, switch(addr) { case 0x00: - val = acpi_pm1_evt_get_sts(&s->pm1a, s->tmr.overflow_time); + val = acpi_pm1_evt_get_sts(&s->ar, s->ar.tmr.overflow_time); break; case 0x02: - val = s->pm1a.en; + val = s->ar.pm1.evt.en; break; case 0x04: - val = s->pm1_cnt.cnt; + val = s->ar.pm1.cnt.cnt; break; case 0x08: - val = acpi_pm_tmr_get(&s->tmr); + val = acpi_pm_tmr_get(&s->ar); break; default: val = 0; @@ -170,7 +167,7 @@ static void apm_ctrl_changed(uint32_t val, void *arg) PIIX4PMState *s = arg; /* ACPI specs 3.0, 4.7.2.5 */ - acpi_pm1_cnt_update(&s->pm1_cnt, val == ACPI_ENABLE, val == ACPI_DISABLE); + acpi_pm1_cnt_update(&s->ar, val == ACPI_ENABLE, val == ACPI_DISABLE); if (s->dev.config[0x5b] & (1 << 1)) { if (s->smi_irq) { @@ -258,13 +255,13 @@ static const VMStateDescription vmstate_acpi = { .post_load = vmstate_acpi_post_load, .fields = (VMStateField []) { VMSTATE_PCI_DEVICE(dev, PIIX4PMState), - VMSTATE_UINT16(pm1a.sts, PIIX4PMState), - VMSTATE_UINT16(pm1a.en, PIIX4PMState), - VMSTATE_UINT16(pm1_cnt.cnt, PIIX4PMState), + VMSTATE_UINT16(ar.pm1.evt.sts, PIIX4PMState), + VMSTATE_UINT16(ar.pm1.evt.en, PIIX4PMState), + VMSTATE_UINT16(ar.pm1.cnt.cnt, PIIX4PMState), VMSTATE_STRUCT(apm, PIIX4PMState, 0, vmstate_apm, APMState), - VMSTATE_TIMER(tmr.timer, PIIX4PMState), - VMSTATE_INT64(tmr.overflow_time, PIIX4PMState), - VMSTATE_STRUCT(gpe, PIIX4PMState, 2, vmstate_gpe, ACPIGPE), + VMSTATE_TIMER(ar.tmr.timer, PIIX4PMState), + VMSTATE_INT64(ar.tmr.overflow_time, PIIX4PMState), + VMSTATE_STRUCT(ar.gpe, PIIX4PMState, 2, vmstate_gpe, ACPIGPE), VMSTATE_STRUCT(pci0_status, PIIX4PMState, 2, vmstate_pci_status, struct pci_status), VMSTATE_END_OF_LIST() @@ -310,10 +307,9 @@ static void piix4_reset(void *opaque) static void piix4_powerdown(void *opaque, int irq, int power_failing) { PIIX4PMState *s = opaque; - ACPIPM1EVT *pm1a = s? &s->pm1a: NULL; - ACPIPMTimer *tmr = s? &s->tmr: NULL; - acpi_pm1_evt_power_down(pm1a, tmr); + assert(s != NULL); + acpi_pm1_evt_power_down(&s->ar); } static void piix4_pm_machine_ready(Notifier *n, void *opaque) @@ -361,8 +357,8 @@ static int piix4_pm_initfn(PCIDevice *dev) register_ioport_write(s->smb_io_base, 64, 1, smb_ioport_writeb, &s->smb); register_ioport_read(s->smb_io_base, 64, 1, smb_ioport_readb, &s->smb); - acpi_pm_tmr_init(&s->tmr, pm_tmr_timer); - acpi_gpe_init(&s->gpe, GPE_LEN); + acpi_pm_tmr_init(&s->ar, pm_tmr_timer); + acpi_gpe_init(&s->ar, GPE_LEN); qemu_system_powerdown = *qemu_allocate_irqs(piix4_powerdown, s, 1); @@ -387,7 +383,7 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, s = DO_UPCAST(PIIX4PMState, dev, dev); s->irq = sci_irq; - acpi_pm1_cnt_init(&s->pm1_cnt, cmos_s3); + acpi_pm1_cnt_init(&s->ar, cmos_s3); s->smi_irq = smi_irq; s->kvm_enabled = kvm_enabled; @@ -436,7 +432,7 @@ type_init(piix4_pm_register_types) static uint32_t gpe_readb(void *opaque, uint32_t addr) { PIIX4PMState *s = opaque; - uint32_t val = acpi_gpe_ioport_readb(&s->gpe, addr); + uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr); PIIX4_DPRINTF("gpe read %x == %x\n", addr, val); return val; @@ -446,7 +442,7 @@ static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val) { PIIX4PMState *s = opaque; - acpi_gpe_ioport_writeb(&s->gpe, addr, val); + acpi_gpe_ioport_writeb(&s->ar, addr, val); pm_update_sci(s); PIIX4_DPRINTF("gpe write %x <== %d\n", addr, val); @@ -531,7 +527,7 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) register_ioport_write(GPE_BASE, GPE_LEN, 1, gpe_writeb, s); register_ioport_read(GPE_BASE, GPE_LEN, 1, gpe_readb, s); - acpi_gpe_blk(&s->gpe, GPE_BASE); + acpi_gpe_blk(&s->ar, GPE_BASE); register_ioport_write(PCI_BASE, 8, 4, pcihotplug_write, pci0_status); register_ioport_read(PCI_BASE, 8, 4, pcihotplug_read, pci0_status); @@ -547,13 +543,13 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) static void enable_device(PIIX4PMState *s, int slot) { - s->gpe.sts[0] |= PIIX4_PCI_HOTPLUG_STATUS; + s->ar.gpe.sts[0] |= PIIX4_PCI_HOTPLUG_STATUS; s->pci0_status.up |= (1 << slot); } static void disable_device(PIIX4PMState *s, int slot) { - s->gpe.sts[0] |= PIIX4_PCI_HOTPLUG_STATUS; + s->ar.gpe.sts[0] |= PIIX4_PCI_HOTPLUG_STATUS; s->pci0_status.down |= (1 << slot); } -- cgit v1.1