From e1c6bbabee30db2e007e7fcbdaf088c54151f1d0 Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Fri, 5 Feb 2010 18:48:36 +0000 Subject: Refactor DEC 21154 PCI bridge It's currently not used by PPC machines. Refactor so that also Sparc64 machines can use it. Signed-off-by: Blue Swirl --- Makefile.target | 2 +- hw/dec_pci.c | 84 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ hw/grackle_pci.c | 51 ---------------------------------- hw/unin_pci.c | 55 ------------------------------------- 4 files changed, 85 insertions(+), 107 deletions(-) create mode 100644 hw/dec_pci.c diff --git a/Makefile.target b/Makefile.target index 5c0ef1f..178edbf 100644 --- a/Makefile.target +++ b/Makefile.target @@ -224,7 +224,7 @@ obj-ppc-y += macio.o cuda.o adb.o mac_nvram.o mac_dbdma.o # OldWorld PowerMac obj-ppc-y += heathrow_pic.o grackle_pci.o ppc_oldworld.o # NewWorld PowerMac -obj-ppc-y += unin_pci.o ppc_newworld.o +obj-ppc-y += unin_pci.o ppc_newworld.o dec_pci.o # PowerPC 4xx boards obj-ppc-y += pflash_cfi02.o ppc4xx_devs.o ppc4xx_pci.o ppc405_uc.o ppc405_boards.o obj-ppc-y += ppc440.o ppc440_bamboo.o diff --git a/hw/dec_pci.c b/hw/dec_pci.c new file mode 100644 index 0000000..2bf4f71 --- /dev/null +++ b/hw/dec_pci.c @@ -0,0 +1,84 @@ +/* + * QEMU DEC 21154 PCI bridge + * + * Copyright (c) 2006-2007 Fabrice Bellard + * Copyright (c) 2007 Jocelyn Mayer + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "sysbus.h" +#include "pci.h" +#include "pci_host.h" + +/* debug DEC */ +//#define DEBUG_DEC + +#ifdef DEBUG_DEC +#define DEC_DPRINTF(fmt, ...) \ + do { printf("DEC: " fmt , ## __VA_ARGS__); } while (0) +#else +#define DEC_DPRINTF(fmt, ...) +#endif + +typedef struct DECState { + SysBusDevice busdev; + PCIHostState host_state; +} DECState; + +static int pci_dec_21154_init_device(SysBusDevice *dev) +{ + DECState *s; + int pci_mem_config, pci_mem_data; + + s = FROM_SYSBUS(DECState, dev); + + pci_mem_config = pci_host_conf_register_mmio(&s->host_state); + pci_mem_data = pci_host_data_register_mmio(&s->host_state); + sysbus_init_mmio(dev, 0x1000, pci_mem_config); + sysbus_init_mmio(dev, 0x1000, pci_mem_data); + return 0; +} + +static int dec_21154_pci_host_init(PCIDevice *d) +{ + /* PCI2PCI bridge same values as PearPC - check this */ + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC); + pci_config_set_device_id(d->config, PCI_DEVICE_ID_DEC_21154); + d->config[0x08] = 0x02; // revision + pci_config_set_class(d->config, PCI_CLASS_BRIDGE_PCI); + d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_BRIDGE; // header_type + return 0; +} + +static PCIDeviceInfo dec_21154_pci_host_info = { + .qdev.name = "dec-21154", + .qdev.size = sizeof(PCIDevice), + .init = dec_21154_pci_host_init, + .header_type = PCI_HEADER_TYPE_BRIDGE, +}; + +static void dec_register_devices(void) +{ + sysbus_register_dev("dec-21154", sizeof(DECState), + pci_dec_21154_init_device); + pci_qdev_register(&dec_21154_pci_host_info); +} + +device_init(dec_register_devices) diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c index f455c59..c026bf2 100644 --- a/hw/grackle_pci.c +++ b/hw/grackle_pci.c @@ -119,20 +119,6 @@ static int pci_grackle_init_device(SysBusDevice *dev) return 0; } -static int pci_dec_21154_init_device(SysBusDevice *dev) -{ - GrackleState *s; - int pci_mem_config, pci_mem_data; - - s = FROM_SYSBUS(GrackleState, dev); - - pci_mem_config = pci_host_conf_register_mmio(&s->host_state); - pci_mem_data = pci_host_data_register_mmio(&s->host_state); - sysbus_init_mmio(dev, 0x1000, pci_mem_config); - sysbus_init_mmio(dev, 0x1000, pci_mem_data); - return 0; -} - static int grackle_pci_host_init(PCIDevice *d) { pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MOTOROLA); @@ -144,54 +130,17 @@ static int grackle_pci_host_init(PCIDevice *d) return 0; } -static int dec_21154_pci_host_init(PCIDevice *d) -{ - /* PCI2PCI bridge same values as PearPC - check this */ - pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC); - pci_config_set_device_id(d->config, PCI_DEVICE_ID_DEC_21154); - d->config[0x08] = 0x02; // revision - pci_config_set_class(d->config, PCI_CLASS_BRIDGE_PCI); - d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_BRIDGE; // header_type - - d->config[0x18] = 0x0; // primary_bus - d->config[0x19] = 0x1; // secondary_bus - d->config[0x1a] = 0x1; // subordinate_bus - d->config[0x1c] = 0x10; // io_base - d->config[0x1d] = 0x20; // io_limit - - d->config[0x20] = 0x80; // memory_base - d->config[0x21] = 0x80; - d->config[0x22] = 0x90; // memory_limit - d->config[0x23] = 0x80; - - d->config[0x24] = 0x00; // prefetchable_memory_base - d->config[0x25] = 0x84; - d->config[0x26] = 0x00; // prefetchable_memory_limit - d->config[0x27] = 0x85; - return 0; -} - static PCIDeviceInfo grackle_pci_host_info = { .qdev.name = "grackle", .qdev.size = sizeof(PCIDevice), .init = grackle_pci_host_init, }; -static PCIDeviceInfo dec_21154_pci_host_info = { - .qdev.name = "dec-21154", - .qdev.size = sizeof(PCIDevice), - .init = dec_21154_pci_host_init, - .header_type = PCI_HEADER_TYPE_BRIDGE, -}; - static void grackle_register_devices(void) { sysbus_register_dev("grackle", sizeof(GrackleState), pci_grackle_init_device); pci_qdev_register(&grackle_pci_host_info); - sysbus_register_dev("dec-21154", sizeof(GrackleState), - pci_dec_21154_init_device); - pci_qdev_register(&dec_21154_pci_host_info); } device_init(grackle_register_devices) diff --git a/hw/unin_pci.c b/hw/unin_pci.c index b8a805b..19eb5e0 100644 --- a/hw/unin_pci.c +++ b/hw/unin_pci.c @@ -94,22 +94,6 @@ static int pci_unin_main_init_device(SysBusDevice *dev) return 0; } -static int pci_dec_21154_init_device(SysBusDevice *dev) -{ - UNINState *s; - int pci_mem_config, pci_mem_data; - - /* Uninorth bridge */ - s = FROM_SYSBUS(UNINState, dev); - - // XXX: s = &pci_bridge[2]; - pci_mem_config = pci_host_conf_register_mmio_noswap(&s->host_state); - pci_mem_data = pci_host_data_register_mmio(&s->host_state); - sysbus_init_mmio(dev, 0x1000, pci_mem_config); - sysbus_init_mmio(dev, 0x1000, pci_mem_data); - return 0; -} - static int pci_unin_agp_init_device(SysBusDevice *dev) { UNINState *s; @@ -204,35 +188,6 @@ static int unin_main_pci_host_init(PCIDevice *d) return 0; } -static int dec_21154_pci_host_init(PCIDevice *d) -{ - /* pci-to-pci bridge */ - pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC); - pci_config_set_device_id(d->config, PCI_DEVICE_ID_DEC_21154); - d->config[0x08] = 0x05; // revision - pci_config_set_class(d->config, PCI_CLASS_BRIDGE_PCI); - d->config[0x0C] = 0x08; // cache_line_size - d->config[0x0D] = 0x20; // latency_timer - d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_BRIDGE; // header_type - - d->config[0x18] = 0x01; // primary_bus - d->config[0x19] = 0x02; // secondary_bus - d->config[0x1A] = 0x02; // subordinate_bus - d->config[0x1B] = 0x20; // secondary_latency_timer - d->config[0x1C] = 0x11; // io_base - d->config[0x1D] = 0x01; // io_limit - d->config[0x20] = 0x00; // memory_base - d->config[0x21] = 0x80; - d->config[0x22] = 0x00; // memory_limit - d->config[0x23] = 0x80; - d->config[0x24] = 0x01; // prefetchable_memory_base - d->config[0x25] = 0x80; - d->config[0x26] = 0xF1; // prefectchable_memory_limit - d->config[0x27] = 0x7F; - // d->config[0x34] = 0xdc // capabilities_pointer - return 0; -} - static int unin_agp_pci_host_init(PCIDevice *d) { pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); @@ -265,13 +220,6 @@ static PCIDeviceInfo unin_main_pci_host_info = { .init = unin_main_pci_host_init, }; -static PCIDeviceInfo dec_21154_pci_host_info = { - .qdev.name = "dec-21154", - .qdev.size = sizeof(PCIDevice), - .init = dec_21154_pci_host_init, - .header_type = PCI_HEADER_TYPE_BRIDGE, -}; - static PCIDeviceInfo unin_agp_pci_host_info = { .qdev.name = "uni-north-agp", .qdev.size = sizeof(PCIDevice), @@ -289,9 +237,6 @@ static void unin_register_devices(void) sysbus_register_dev("uni-north", sizeof(UNINState), pci_unin_main_init_device); pci_qdev_register(&unin_main_pci_host_info); - sysbus_register_dev("dec-21154", sizeof(UNINState), - pci_dec_21154_init_device); - pci_qdev_register(&dec_21154_pci_host_info); sysbus_register_dev("uni-north-agp", sizeof(UNINState), pci_unin_agp_init_device); pci_qdev_register(&unin_agp_pci_host_info); -- cgit v1.1