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* tcg-ppc: Remove the backendRichard Henderson2014-06-232-2042/+0
| | | | | | | Vectoring the 32-bit build to the ppc64 directory. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Merge ppc32 shiftsRichard Henderson2014-06-231-8/+32
| | | | | Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Support mulsh_i32Richard Henderson2014-06-232-1/+6
| | | | | Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Merge ppc32 register usageRichard Henderson2014-06-231-22/+39
| | | | | | | Good enough to run some instructions before things go awry. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Merge ppc32 qemu_ld/stRichard Henderson2014-06-231-84/+209
| | | | | Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Merge ppc32 brcond2, setcond2, muluhRichard Henderson2014-06-232-2/+96
| | | | | | | | Now passes tcg_add_target_add_op_defs assertions, but not complete enough to function. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Begin merging ppc32 with ppc64Richard Henderson2014-06-232-43/+81
| | | | | | | | Just enough to compile, assuming you edit config-host.mak manually. It will still abort at runtime, due to missing brcond2, setcond2, mulu2. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Fix sub2 implementationRichard Henderson2014-06-231-7/+7
| | | | | | | All sorts of confusion on argument ordering. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Merge 32-bit ABIs into the prologue / frame codeRichard Henderson2014-06-231-7/+32
| | | | | Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Adjust tcg_out_call for ELFv2Ulrich Weigand2014-06-231-0/+17
| | | | | | | | | | | | | | The new ELFv2 ABI, used by default on powerpc64le-linux hosts, introduced some changes that are incompatible with code currently generated by the ppc64 TGC target. In particular, we no longer use function descriptors. This patch adds support for the ELFv2 ABI in the ppc64 TGC function call and function prologue sequences. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Ulrich Weigand <ulrich.weigand@de.ibm.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Support the ppc64 elfv2 ABIRichard Henderson2014-06-231-0/+4
| | | | | Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Use the correct test in tcg_out_callRichard Henderson2014-06-231-3/+3
| | | | | | | The correct test uses the _CALL_AIX macro, not a host-specific macro. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Better parameterize the stack frameRichard Henderson2014-06-231-28/+36
| | | | | | | In preparation for supporting other ABIs. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Fix TCG_TARGET_CALL_STACK_OFFSETRichard Henderson2014-06-231-1/+1
| | | | | | | | | The calling convention reserves space for the 8 register parameters on the stack, so using only 6*8=48 as the offset was wrong. We never saw this bug because we don't have any helpers with more than 5 parameters. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Move call macros out of tcg-target.hRichard Henderson2014-06-232-6/+5
| | | | | | | | These values are private to tcg.c; we don't need to expose this nonsense to the translators. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Make TCG_AREG0 and TCG_REG_CALL_STACK enum constantsRichard Henderson2014-06-231-35/+11
| | | | | Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Use tcg_out_{ld,st,cmp} internallyRichard Henderson2014-06-231-19/+14
| | | | | | | | Rather than using tcg_out32 and opcodes directly. This allows us to remove LD_ADDR and CMP_L macros. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Relax register restrictions in tcg_out_mem_longRichard Henderson2014-06-231-5/+7
| | | | | | | | In order to be able to use tcg_out_ld/st sensibly with scratch registers, assert only when we'd incorrectly clobber a scratch. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Move functions aroundRichard Henderson2014-06-231-361/+361
| | | | | | | | Code movement only. This will allow us to make use of the other tcg_out_* functions in tidying their implementations. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Avoid some hard-codings of TCG_TYPE_I64Richard Henderson2014-06-231-10/+13
| | | | | | | Using more appropriate _PTR or _REG where possible. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc: Use uintptr_t in ppc_tb_set_jmp_targetRichard Henderson2014-06-231-1/+1
| | | | | Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg/optimize: Don't special case TCG_OPF_CALL_CLOBBERRichard Henderson2014-06-181-5/+4
| | | | | | | With the "old" ldst ops we didn't know the real width of the result of the load, but with the "new" ldst ops we do. Signed-off-by: Richard Henderson <rth@twiddle.net>
* Merge remote-tracking branch 'remotes/bonzini/softmmu-smap' into stagingPeter Maydell2014-06-051-13/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * remotes/bonzini/softmmu-smap: (33 commits) target-i386: cleanup x86_cpu_get_phys_page_debug target-i386: fix protection bits in the TLB for SMEP target-i386: support long addresses for 4MB pages (PSE-36) target-i386: raise page fault for reserved bits in large pages target-i386: unify reserved bits and NX bit check target-i386: simplify pte/vaddr calculation target-i386: raise page fault for reserved physical address bits target-i386: test reserved PS bit on PML4Es target-i386: set correct error code for reserved bit access target-i386: introduce support for 1 GB pages target-i386: introduce do_check_protect label target-i386: tweak handling of PG_NX_MASK target-i386: commonize checks for PAE and non-PAE target-i386: commonize checks for 4MB and 4KB pages target-i386: commonize checks for 2MB and 4KB pages target-i386: fix coding standards in x86_cpu_handle_mmu_fault target-i386: simplify SMAP handling in MMU_KSMAP_IDX target-i386: fix kernel accesses with SMAP and CPL = 3 target-i386: move check_io helpers to seg_helper.c target-i386: rename KSMAP to KNOSMAP ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * softmmu: move all load/store functions to cpu_ldst.hPaolo Bonzini2014-06-051-13/+0
| | | | | | | | | | | | | | | | Unify pieces of cpu-all.h, exec-all.h, softmmu_exec.h and tcg/tcg.h into a single new header file with all helpers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | TCG: Fix tcg_gen_extr_i64_tl for 32bitAlexander Graf2014-06-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | We expose a generic helper "tcg_gen_extr_i64_tl" for 64bit targets, but the same function for 32bit targets is a misnomer and refers to an invalid function name. Fix up the definition to point to the correct internal helper names instead. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | tcg: Remove TCG_TARGET_HAS_new_ldstRichard Henderson2014-06-0413-234/+28
| | | | | | | | | | | | | | Since all backends have been converted, remove the compatibility code. Acked-by: Claudio Fontana <claudio.fontana@huawei.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | tci: Convert to new ldst opcodesRichard Henderson2014-06-042-47/+31
| | | | | | | | | | Tested-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | tcg-i386: Fix win64 qemu storeRichard Henderson2014-06-041-1/+2
|/ | | | | | | | The first non-register argument isn't placed at offset 0. Cc: qemu-stable@nongnu.org Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg/optimize: Remember garbage high bits for 32-bit opsRichard Henderson2014-05-281-7/+26
| | | | | | | | For a 64-bit host, the high bits of a register after a 32-bit operation are undefined. Adjust the temps mask for all 32-bit ops to reflect that. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg/optimize: Move updating of gen_opc_buf into tcg_opt_gen_mov*Richard Henderson2014-05-281-61/+56
| | | | | | No functional change, just reduce a bit of redundancy. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-sparc: Make debug_frame constRichard Henderson2014-05-281-13/+9
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-s390: Make debug_frame constRichard Henderson2014-05-281-13/+9
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-arm: Make debug_frame constRichard Henderson2014-05-281-13/+9
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-aarch64: Make debug_frame constRichard Henderson2014-05-281-13/+9
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-i386: Make debug_frame constRichard Henderson2014-05-281-21/+17
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Allow the debug_frame data structure to be constantRichard Henderson2014-05-281-4/+17
| | | | | | | | Adjust the FDE to point to the code_buffer after we've copied it to the image, rather than requiring that the backend set it prior. This allows the backend to use read-only storage for its data. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Remove sizemask and flags arguments to tcg_gen_callNRichard Henderson2014-05-282-12/+9
| | | | | | Take them from the TCGHelperInfo struct instead. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Save flags and computed sizemask in TCGHelperInfoRichard Henderson2014-05-281-0/+7
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Register the helper info struct rather than the nameRichard Henderson2014-05-281-2/+5
| | | | | | | This will let us find all the info from the hash table. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Inline tcg_gen_helperNRichard Henderson2014-05-281-7/+0
| | | | | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Use helper-gen.h in tcg-op.hRichard Henderson2014-05-281-150/+25
| | | | | | No need to open-code the setup of the builtin helpers. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Push tcg-runtime routines into exec/helper-*Richard Henderson2014-05-284-52/+31
| | | | | | | | Rather than special casing them, use the standard mechanisms for tcg helper generation. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-4/+3
| | | | | | | | | | Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Optimize brcond2 and setcond2 ne/eqRichard Henderson2014-05-281-0/+94
| | | | | | | If either the high or low pair can be resolved, we can simplify to either a constant or to a 32-bit comparison. Signed-off-by: Richard Henderson <rth@twiddle.net>
* Merge remote-tracking branch 'remotes/rth/tcg-mips' into stagingPeter Maydell2014-05-272-918/+945
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * remotes/rth/tcg-mips: (24 commits) tcg-mips: Enable direct chaining of TBs tcg-mips: Simplify movcond tcg-mips: Simplify brcond2 tcg-mips: Improve setcond eq/ne vs zeros tcg-mips: Simplify setcond2 tcg-mips: Simplify brcond tcg-mips: Simplify setcond tcg-mips: Commonize opcode implementations tcg-mips: Improve add2/sub2 tcg-mips: Hoist args loads tcg-mips: Fix subtract immediate range tcg-mips: Name the opcode enumeration tcg-mips: Use EXT for AND on mips32r2 tcg-mips: Use T9 for TCG_TMP1 tcg-mips: Introduce TCG_TMP0, TCG_TMP1 tcg-mips: Rearrange register allocation tcg-mips: Convert to new_ldst tcg-mips: Convert to new qemu_l/st helpers tcg-mips: Move softmmu slow path out of line tcg-mips: Split large ldst offsets ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * tcg-mips: Enable direct chaining of TBsRichard Henderson2014-05-241-1/+10
| | | | | | | | | | | | | | | | Now that the code_gen_buffer is constrained to not cross 256mb regions, we are assured that we can use J to reach another TB. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Simplify movcondRichard Henderson2014-05-241-49/+17
| | | | | | | | | | | | | | Use the same table to fold comparisons as with setcond. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Simplify brcond2Richard Henderson2014-05-241-57/+20
| | | | | | | | | | | | | | | | Emitting a single branch instead of (up to) 3, using setcond2 to generate the composite compare. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Improve setcond eq/ne vs zerosRichard Henderson2014-05-241-4/+36
| | | | | | | | | | | | | | | | | | The original code results in one too many insns per zero present in the input. And since comparing 64-bit numbers vs zero is common... Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Simplify setcond2Richard Henderson2014-05-241-64/+31
| | | | | | | | | | | | | | | | Using tcg_unsigned_cond and tcg_high_cond. Also, move the function up in the file for future cleanups. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
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