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* Fix ARM conditional branch bug.pbrook2008-05-241-0/+18
* Comment non-obvious calculation. Don't clobber r3 in qemu_st64.balrog2008-05-231-6/+33
* A branch insn must not overwrite the branch target before relocation.balrog2008-05-231-3/+14
* added tcg_temp_free() and improved the handling of constantsbellard2008-05-233-229/+396
* Fix qemu_ld/st for mem_index > 0 on arm host.balrog2008-05-231-6/+15
* Define TCG_TARGET_CALL_STACK_OFFSET on arm.balrog2008-05-231-2/+3
* compilation fixbellard2008-05-231-2/+2
* profiler clean upbellard2008-05-232-13/+93
* added debug_insn_start debug instructionbellard2008-05-223-3/+43
* debug output: write helper namesbellard2008-05-222-15/+35
* more generic call codegenbellard2008-05-224-42/+75
* fixed zero shifts (64 bit case)bellard2008-05-221-3/+4
* small shift optsbellard2008-05-221-6/+30
* fixed dead global variable updatebellard2008-05-211-20/+18
* Fix 8-bit signed load/store and a typo.balrog2008-05-201-4/+4
* Implement neg_i32, clean-up.balrog2008-05-202-5/+10
* Remove dyngen ARM code, which did't build.balrog2008-05-201-103/+0
* ARM host support for TCG targets.balrog2008-05-193-1/+1622
* Better solution for the alignment problemblueswir12008-05-191-3/+3
* Switch most MIPS logical and arithmetic instructions to TCG.ths2008-05-181-0/+4
* Fix constant checks on Sparc64 hostblueswir12008-05-181-12/+17
* Fix TCG alignment problems on Sparc64 hostblueswir12008-05-181-2/+2
* added 'pure' function attribute - fixed indirect function callsbellard2008-05-172-23/+46
* added not pseudo op - more _tl macrosbellard2008-05-171-0/+23
* Fix qemu_ld/st branches, constification, use orcc for tst synthetic opblueswir12008-05-171-9/+9
* Implement qemu_ld/st, fix brcond, handle more corner casesblueswir12008-05-161-29/+395
* Implement brcond, ldst with large offset; fix direct jump, prologueblueswir12008-05-151-14/+71
* Fix bit fitting checksblueswir12008-05-151-11/+15
* Fix compilation on Sparc host, implement ld and stblueswir12008-05-142-4/+15
* temporary hack to handle register shortage with dyngen for qemu_st64()bellard2008-05-122-0/+41
* Add TCG native negation op.pbrook2008-05-115-0/+42
* Add zero extension (pseudo-)ops.pbrook2008-05-112-2/+50
* REXB optimization cannot be done at this levelbellard2008-05-101-1/+1
* fixed qemu_st8 insn - prologue saved too many registersbellard2008-05-101-8/+6
* Fix DEBUG_TCGV.pbrook2008-05-101-3/+3
* Rename CONFIG_NO_DYNGEN_OP to CONFIG_DYNGEN_OP to avoid double negativesblueswir12008-05-104-4/+4
* fixed global variable handling with qemu load/stores - initial global prologu...bellard2008-05-104-62/+219
* Fix i64 remainder calculation copy-paste error.balrog2008-05-061-2/+2
* Add helpers and shorthands for mul and muli operations.ths2008-05-041-0/+19
* Skip register moves when the target and the source are the sameblueswir12008-05-031-4/+8
* HPPA (PA-RISC) host supportaurel322008-04-127-10/+1263
* Remove osdep.c/qemu-img code duplicationaurel322008-04-111-31/+1
* ARM TCG conversion 9/16.pbrook2008-03-311-0/+12
* ARM TCG conversion 7/16.pbrook2008-03-311-0/+19
* Add TL variants of trunc and ext/extublueswir12008-03-221-0/+12
* Prepare for op.c removal and zero legacy opsblueswir12008-03-214-0/+9
* Make TCG br op availableblueswir12008-03-211-0/+5
* Increase max temps limitblueswir12008-03-161-1/+1
* Add discard_ptr and discard_tlblueswir12008-03-161-0/+4
* Add tcg_const_tlblueswir12008-03-131-0/+2
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