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Commit message (
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Author
Age
Files
Lines
...
*
Shuffle contents of tcg_target_reg_alloc_order
malc
2008-06-23
1
-18
/
+18
*
Save LR into proper place on callers stack frame
malc
2008-06-18
1
-2
/
+2
*
Reimplement brcond2 and refactor brcond
malc
2008-06-12
1
-51
/
+52
*
Allocate register pair for 64-bit registers on 32-bit host.
ths
2008-06-11
1
-2
/
+2
*
Remove stray variable
malc
2008-06-10
1
-1
/
+1
*
Use rem/div[u]_i32 drop div[u]2_i32
malc
2008-06-09
2
-113
/
+26
*
Emit trampolines manually in prologue
malc
2008-06-09
1
-38
/
+80
*
Fix test for signed div fast path
malc
2008-06-09
1
-1
/
+7
*
Fix div[u]2.
malc
2008-06-09
1
-26
/
+65
*
PPC TCG Fixes
malc
2008-06-07
1
-33
/
+17
*
Allocate a register pair instead of a single register.
ths
2008-06-07
1
-1
/
+1
*
Spelling fixes, by Stefan Weil.
ths
2008-06-03
1
-1
/
+1
*
support of long calls for PPC (malc)
bellard
2008-05-30
2
-31
/
+68
*
Fix signed/unsigned issues of immediate version of brcond (malc)
bellard
2008-05-26
1
-11
/
+48
*
ppc TCG target (malc)
bellard
2008-05-25
2
-0
/
+1493
*
jump simplification
bellard
2008-05-25
1
-22
/
+1
*
jump optimizations
bellard
2008-05-25
1
-31
/
+9
*
update
bellard
2008-05-25
2
-86
/
+64
*
suppressed unused macro handling
bellard
2008-05-25
4
-109
/
+2
*
added local temporaries
bellard
2008-05-25
2
-45
/
+103
*
Implement byte swapping accesses
blueswir1
2008-05-25
1
-36
/
+66
*
Fix off-by-one unwinding error.
pbrook
2008-05-25
1
-1
/
+0
*
Relax a constraint for qemu_ld64 on ARM host.
balrog
2008-05-24
1
-4
/
+13
*
Fix a deadly typo, correct comments.
balrog
2008-05-24
1
-4
/
+6
*
Fix ARM host TLB.
pbrook
2008-05-24
1
-61
/
+44
*
Implement 64-bit constant loads
blueswir1
2008-05-24
1
-15
/
+27
*
Use sethi and arith functions, fix comment
blueswir1
2008-05-24
1
-23
/
+26
*
Fix stack offsets and alignment
blueswir1
2008-05-24
1
-7
/
+4
*
Define stack offsets
blueswir1
2008-05-24
1
-0
/
+5
*
More TCGv type fixes.
pbrook
2008-05-24
1
-2
/
+9
*
Fix ARM conditional branch bug.
pbrook
2008-05-24
1
-0
/
+18
*
Comment non-obvious calculation. Don't clobber r3 in qemu_st64.
balrog
2008-05-23
1
-6
/
+33
*
A branch insn must not overwrite the branch target before relocation.
balrog
2008-05-23
1
-3
/
+14
*
added tcg_temp_free() and improved the handling of constants
bellard
2008-05-23
3
-229
/
+396
*
Fix qemu_ld/st for mem_index > 0 on arm host.
balrog
2008-05-23
1
-6
/
+15
*
Define TCG_TARGET_CALL_STACK_OFFSET on arm.
balrog
2008-05-23
1
-2
/
+3
*
compilation fix
bellard
2008-05-23
1
-2
/
+2
*
profiler clean up
bellard
2008-05-23
2
-13
/
+93
*
added debug_insn_start debug instruction
bellard
2008-05-22
3
-3
/
+43
*
debug output: write helper names
bellard
2008-05-22
2
-15
/
+35
*
more generic call codegen
bellard
2008-05-22
4
-42
/
+75
*
fixed zero shifts (64 bit case)
bellard
2008-05-22
1
-3
/
+4
*
small shift opts
bellard
2008-05-22
1
-6
/
+30
*
fixed dead global variable update
bellard
2008-05-21
1
-20
/
+18
*
Fix 8-bit signed load/store and a typo.
balrog
2008-05-20
1
-4
/
+4
*
Implement neg_i32, clean-up.
balrog
2008-05-20
2
-5
/
+10
*
Remove dyngen ARM code, which did't build.
balrog
2008-05-20
1
-103
/
+0
*
ARM host support for TCG targets.
balrog
2008-05-19
3
-1
/
+1622
*
Better solution for the alignment problem
blueswir1
2008-05-19
1
-3
/
+3
*
Switch most MIPS logical and arithmetic instructions to TCG.
ths
2008-05-18
1
-0
/
+4
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