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* tcg-sparc: Accept stores of zeroRichard Henderson2014-04-281-2/+2
* tcg-sparc: Fix small 32-bit moviRichard Henderson2014-04-281-0/+5
* tcg-sparc: Fixup function argument typesRichard Henderson2014-04-281-66/+51
* tcg-sparc: Hoist common argument loads in tcg_out_opRichard Henderson2014-04-281-63/+60
* tcg-sparc: Don't handle mov/movi in tcg_out_opRichard Henderson2014-04-281-7/+6
* tcg-sparc: Tidy check_fit_* testsRichard Henderson2014-04-281-15/+20
* tcg-sparc: Implement muls2_i32Richard Henderson2014-04-282-4/+16
* tcg-sparc: Use the RETURN instructionRichard Henderson2014-04-281-4/+10
* tcg-sparc: Use 64-bit registers with sparcv8plusRichard Henderson2014-04-283-361/+258
* tcg-sparc: Support trunc_shr_i32Richard Henderson2014-04-282-1/+9
* tcg-sparc: Remove most uses of TCG_TARGET_REG_BITSRichard Henderson2014-04-281-33/+37
* tcg: Add INDEX_op_trunc_shr_i32Richard Henderson2014-04-2812-16/+67
* tcg: Fix missed pointer size != TCG_TARGET_REG_BITS changesRichard Henderson2014-04-281-2/+2
* Merge remote-tracking branch 'remotes/rth/tags/tcg-next-20140422' into stagingPeter Maydell2014-04-2425-157/+160
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| * tcg: Use HOST_WORDS_BIGENDIANRichard Henderson2014-04-1812-32/+12
| * tcg: Fix fallback from muls2_i64 to mulu2_i64Richard Henderson2014-04-181-20/+18
| * tcg: Use tcg_gen_mulu2_i32 in tcg_gen_muls2_i32Richard Henderson2014-04-181-4/+2
| * tcg: Relax requirement for mulu2_i32 on 32-bit hostsRichard Henderson2014-04-185-1/+12
| * tcg-s390: Remove W constraintRichard Henderson2014-04-181-24/+19
| * tcg-sparc: Use the type parameter to tcg_target_const_matchRichard Henderson2014-04-181-1/+7
| * tcg-ppc64: Use the type parameter to tcg_target_const_matchRichard Henderson2014-04-181-1/+9
| * tcg-aarch64: Remove w constraintRichard Henderson2014-04-181-22/+18
| * tcg: Add TCGType parameter to tcg_target_const_matchRichard Henderson2014-04-1811-13/+13
| * tcg: Fix out of range shift in deposit optimizationsRichard Henderson2014-04-181-6/+4
| * tcg: Mask shift quantities while foldingRichard Henderson2014-04-181-15/+20
| * tcg: Use "unspecified behavior" for shiftsRichard Henderson2014-04-181-5/+13
| * tcg: Fix warning (1 bit signed bitfield entry) and replace int by boolStefan Weil2014-04-185-13/+13
* | tcg-ia64: Convert to new ldst opcodesRichard Henderson2014-04-172-67/+35
* | tcg-ia64: Move part of softmmu slow path out of lineRichard Henderson2014-04-171-62/+114
* | tcg-ia64: Convert to new ldst helpersRichard Henderson2014-04-171-62/+80
* | tcg-ia64: Reduce code duplication in tcg_out_qemu_ldRichard Henderson2014-04-171-37/+24
* | tcg-ia64: Move tlb addend load into tlb readRichard Henderson2014-04-171-12/+12
* | tcg-ia64: Move bswap for store into tlb loadRichard Henderson2014-04-171-63/+31
* | tcg-ia64: Re-bundle the tlb loadRichard Henderson2014-04-171-23/+54
* | tcg-ia64: Optimize small arguments to exit_tbRichard Henderson2014-04-171-3/+9
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* tcg-aarch64: Use tcg_out_mov in preference to tcg_out_movrRichard Henderson2014-04-161-9/+7
* tcg-aarch64: Prefer unsigned offsets before signed offsets for ldstRichard Henderson2014-04-161-5/+6
* tcg-aarch64: Introduce tcg_out_insn_3312, _3310, _3313Richard Henderson2014-04-161-87/+89
* tcg-aarch64: Merge aarch64_ldst_get_data/type into tcg_out_opRichard Henderson2014-04-161-83/+32
* tcg-aarch64: Introduce tcg_out_insn_3507Richard Henderson2014-04-161-24/+33
* tcg-aarch64: Support stores of zeroRichard Henderson2014-04-161-16/+19
* tcg-aarch64: Implement TCG_TARGET_HAS_new_ldstRichard Henderson2014-04-162-60/+31
* tcg-aarch64: Pass qemu_ld/st arguments directlyRichard Henderson2014-04-161-32/+17
* tcg-aarch64: Use TCGMemOp in qemu_ld/stRichard Henderson2014-04-161-68/+63
* tcg-aarch64: Use ADR to pass the return address to the ld/st helpersRichard Henderson2014-04-161-2/+9
* tcg-aarch64: Use tcg_out_call for qemu_ld/stRichard Henderson2014-04-161-4/+2
* tcg-aarch64: Avoid add with zero in tlb loadRichard Henderson2014-04-161-9/+19
* tcg-aarch64: Implement tcg_register_jitRichard Henderson2014-04-161-15/+69
* tcg-aarch64: Introduce tcg_out_insn_3314Richard Henderson2014-04-161-67/+33
* tcg-aarch64: Reuse LR in translated codeRichard Henderson2014-04-162-33/+33
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