summaryrefslogtreecommitdiffstats
path: root/tcg
Commit message (Collapse)AuthorAgeFilesLines
* Merge remote-tracking branch 'remotes/bonzini/softmmu-smap' into stagingPeter Maydell2014-06-051-13/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * remotes/bonzini/softmmu-smap: (33 commits) target-i386: cleanup x86_cpu_get_phys_page_debug target-i386: fix protection bits in the TLB for SMEP target-i386: support long addresses for 4MB pages (PSE-36) target-i386: raise page fault for reserved bits in large pages target-i386: unify reserved bits and NX bit check target-i386: simplify pte/vaddr calculation target-i386: raise page fault for reserved physical address bits target-i386: test reserved PS bit on PML4Es target-i386: set correct error code for reserved bit access target-i386: introduce support for 1 GB pages target-i386: introduce do_check_protect label target-i386: tweak handling of PG_NX_MASK target-i386: commonize checks for PAE and non-PAE target-i386: commonize checks for 4MB and 4KB pages target-i386: commonize checks for 2MB and 4KB pages target-i386: fix coding standards in x86_cpu_handle_mmu_fault target-i386: simplify SMAP handling in MMU_KSMAP_IDX target-i386: fix kernel accesses with SMAP and CPL = 3 target-i386: move check_io helpers to seg_helper.c target-i386: rename KSMAP to KNOSMAP ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * softmmu: move all load/store functions to cpu_ldst.hPaolo Bonzini2014-06-051-13/+0
| | | | | | | | | | | | | | | | Unify pieces of cpu-all.h, exec-all.h, softmmu_exec.h and tcg/tcg.h into a single new header file with all helpers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | TCG: Fix tcg_gen_extr_i64_tl for 32bitAlexander Graf2014-06-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | We expose a generic helper "tcg_gen_extr_i64_tl" for 64bit targets, but the same function for 32bit targets is a misnomer and refers to an invalid function name. Fix up the definition to point to the correct internal helper names instead. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | tcg: Remove TCG_TARGET_HAS_new_ldstRichard Henderson2014-06-0413-234/+28
| | | | | | | | | | | | | | Since all backends have been converted, remove the compatibility code. Acked-by: Claudio Fontana <claudio.fontana@huawei.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | tci: Convert to new ldst opcodesRichard Henderson2014-06-042-47/+31
| | | | | | | | | | Tested-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | tcg-i386: Fix win64 qemu storeRichard Henderson2014-06-041-1/+2
|/ | | | | | | | The first non-register argument isn't placed at offset 0. Cc: qemu-stable@nongnu.org Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg/optimize: Remember garbage high bits for 32-bit opsRichard Henderson2014-05-281-7/+26
| | | | | | | | For a 64-bit host, the high bits of a register after a 32-bit operation are undefined. Adjust the temps mask for all 32-bit ops to reflect that. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg/optimize: Move updating of gen_opc_buf into tcg_opt_gen_mov*Richard Henderson2014-05-281-61/+56
| | | | | | No functional change, just reduce a bit of redundancy. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-sparc: Make debug_frame constRichard Henderson2014-05-281-13/+9
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-s390: Make debug_frame constRichard Henderson2014-05-281-13/+9
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-arm: Make debug_frame constRichard Henderson2014-05-281-13/+9
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-aarch64: Make debug_frame constRichard Henderson2014-05-281-13/+9
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-i386: Make debug_frame constRichard Henderson2014-05-281-21/+17
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Allow the debug_frame data structure to be constantRichard Henderson2014-05-281-4/+17
| | | | | | | | Adjust the FDE to point to the code_buffer after we've copied it to the image, rather than requiring that the backend set it prior. This allows the backend to use read-only storage for its data. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Remove sizemask and flags arguments to tcg_gen_callNRichard Henderson2014-05-282-12/+9
| | | | | | Take them from the TCGHelperInfo struct instead. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Save flags and computed sizemask in TCGHelperInfoRichard Henderson2014-05-281-0/+7
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Register the helper info struct rather than the nameRichard Henderson2014-05-281-2/+5
| | | | | | | This will let us find all the info from the hash table. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Inline tcg_gen_helperNRichard Henderson2014-05-281-7/+0
| | | | | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Use helper-gen.h in tcg-op.hRichard Henderson2014-05-281-150/+25
| | | | | | No need to open-code the setup of the builtin helpers. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Push tcg-runtime routines into exec/helper-*Richard Henderson2014-05-284-52/+31
| | | | | | | | Rather than special casing them, use the standard mechanisms for tcg helper generation. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-4/+3
| | | | | | | | | | Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Optimize brcond2 and setcond2 ne/eqRichard Henderson2014-05-281-0/+94
| | | | | | | If either the high or low pair can be resolved, we can simplify to either a constant or to a 32-bit comparison. Signed-off-by: Richard Henderson <rth@twiddle.net>
* Merge remote-tracking branch 'remotes/rth/tcg-mips' into stagingPeter Maydell2014-05-272-918/+945
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * remotes/rth/tcg-mips: (24 commits) tcg-mips: Enable direct chaining of TBs tcg-mips: Simplify movcond tcg-mips: Simplify brcond2 tcg-mips: Improve setcond eq/ne vs zeros tcg-mips: Simplify setcond2 tcg-mips: Simplify brcond tcg-mips: Simplify setcond tcg-mips: Commonize opcode implementations tcg-mips: Improve add2/sub2 tcg-mips: Hoist args loads tcg-mips: Fix subtract immediate range tcg-mips: Name the opcode enumeration tcg-mips: Use EXT for AND on mips32r2 tcg-mips: Use T9 for TCG_TMP1 tcg-mips: Introduce TCG_TMP0, TCG_TMP1 tcg-mips: Rearrange register allocation tcg-mips: Convert to new_ldst tcg-mips: Convert to new qemu_l/st helpers tcg-mips: Move softmmu slow path out of line tcg-mips: Split large ldst offsets ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * tcg-mips: Enable direct chaining of TBsRichard Henderson2014-05-241-1/+10
| | | | | | | | | | | | | | | | Now that the code_gen_buffer is constrained to not cross 256mb regions, we are assured that we can use J to reach another TB. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Simplify movcondRichard Henderson2014-05-241-49/+17
| | | | | | | | | | | | | | Use the same table to fold comparisons as with setcond. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Simplify brcond2Richard Henderson2014-05-241-57/+20
| | | | | | | | | | | | | | | | Emitting a single branch instead of (up to) 3, using setcond2 to generate the composite compare. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Improve setcond eq/ne vs zerosRichard Henderson2014-05-241-4/+36
| | | | | | | | | | | | | | | | | | The original code results in one too many insns per zero present in the input. And since comparing 64-bit numbers vs zero is common... Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Simplify setcond2Richard Henderson2014-05-241-64/+31
| | | | | | | | | | | | | | | | Using tcg_unsigned_cond and tcg_high_cond. Also, move the function up in the file for future cleanups. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Simplify brcondRichard Henderson2014-05-241-46/+41
| | | | | | | | | | | | | | Use the same table to fold comparisons as with setcond. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Simplify setcondRichard Henderson2014-05-241-58/+67
| | | | | | | | | | | | | | | | Use a table to fold comparisons to less-than. Also, move the function up in the file for futher simplifications. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Commonize opcode implementationsRichard Henderson2014-05-241-114/+98
| | | | | | | | | | | | | | Most opcodes fall in to one of a couple of patterns. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Improve add2/sub2Richard Henderson2014-05-241-31/+56
| | | | | | | | | | | | | | Reduce insn count from 5 to either 3 or 4. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Hoist args loadsRichard Henderson2014-05-241-98/+103
| | | | | | | | | | Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Fix subtract immediate rangeRichard Henderson2014-05-241-5/+11
| | | | | | | | | | | | | | | | Since we must use ADDUI, we would generate incorrect code for -32768. Leaving off subtract of +32768 makes things easier for a follow-on patch. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Name the opcode enumerationRichard Henderson2014-05-241-9/+9
| | | | | | | | | | | | | | And use it in the opcode emission functions. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Use EXT for AND on mips32r2Richard Henderson2014-05-242-14/+50
| | | | | | | | | | | | | | At the same time, tidy deposit by introducing tcg_out_opc_bf. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Use T9 for TCG_TMP1Richard Henderson2014-05-241-1/+1
| | | | | | | | | | | | | | | | | | T0 is an argument register for the n32 and n64 abis. T9 is the call address register for the abis, and is more directly under the control of the backend. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Introduce TCG_TMP0, TCG_TMP1Richard Henderson2014-05-241-114/+117
| | | | | | | | | | | | | | Use these instead of hard-coding the registers to use for temporaries. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Rearrange register allocationRichard Henderson2014-05-242-11/+19
| | | | | | | | | | | | | | | | | | | | | | | | Use FP (also known as S8) as a normal call-saved register. Include T0 in the allocation order and call-clobbered list even though it's currently used as a TCG temporary. Put the argument registers at the end of the allocation order. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Convert to new_ldstRichard Henderson2014-05-242-53/+25
| | | | | | | | | | Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Convert to new qemu_l/st helpersRichard Henderson2014-05-241-51/+56
| | | | | | | | | | | | | | | | In addition, fill delay slots calling the helpers and tail call to the store helpers. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Move softmmu slow path out of lineRichard Henderson2014-05-241-389/+383
| | | | | | | | | | | | | | | | | | At the same time, tidy up the call helpers, avoiding a memory reference. Split out several subroutines. Use TCGMemOp constants. Make endianness selectable at runtime. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Split large ldst offsetsRichard Henderson2014-05-241-11/+12
| | | | | | | | | | | | | | Use this to reduce goto_tb by one insn. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Fill the exit_tb delay slotRichard Henderson2014-05-241-7/+18
| | | | | | | | | | Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
| * tcg-mips: Use J and JAL opcodesRichard Henderson2014-05-241-6/+40
| | | | | | | | | | | | | | | | For userland builds calls will normally be in range, and for the exit_tb opcode the branch to the epilogue. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | tci: Fix tcg_out_callRichard Henderson2014-05-221-0/+3
|/ | | | | | | | Broken since dddbb2e1e3f8137d7e3f1faf9758c66cca0c94ea. Do all the rest of the things that tcg_out_op did before and after the big switch statement. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-s390: Implement direct chaining of TBsRichard Henderson2014-05-151-1/+3
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-s390: Improve setcondRichard Henderson2014-05-151-6/+91
| | | | | | | | There are a variety of common cases for which we can use carry tricks to avoid a conditional branch. On very new hardware, use LOAD ON CONDITION instead of a conditional branch. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-s390: Allow immediate operands to add2 and sub2Richard Henderson2014-05-151-12/+52
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-s390: Implement tcg_register_jitRichard Henderson2014-05-151-7/+55
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
OpenPOWER on IntegriCloud