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* qemu tcg: Remove one entry of INDEX_op_ld_i64 from ppc_op_defsLi Zhang2012-03-291-1/+0
| | | | | | | | | | There two entries of INDEX_op_ld_i64 in the ppc_op_defs. That causes an assertion failure in tcg_add_target_add_op_defs() when --enable-debug is used on a ppc64 backend (that's ppc64 host, not target). Signed-off-by: Li Zhang <zhlcindy@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: malc <av1474@comtv.ru>
* tcg-sparc: Add debug_frame support.Richard Henderson2012-03-241-0/+63
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg-hppa: Add debug_frame support.Richard Henderson2012-03-241-15/+88
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Allow ELF_HOST_FLAGS and ELF_OSABI overrides in gdb-jit.Richard Henderson2012-03-241-0/+6
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Add debug_info to JIT ELF image.Richard Henderson2012-03-241-75/+158
| | | | | | | | | This allows us to actually supply a function name in softmmu builds; gdb doesn't pick up the minimal symbol table otherwise. Also add a bit of documentation and statically generate more of the ELF image. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Use the GDB JIT debugging interface.Richard Henderson2012-03-243-9/+301
| | | | | | | | This allows us to generate unwind info for the dynamicly generated code in the code_gen_buffer. Only i386 is converted at this point. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: fix sparc host for AREG0 free operationBlue Swirl2012-03-181-0/+11
| | | | | | | e141ab52d2ea5d0bc6ad3b1ad32841127ca04adc didn't handle the other memory access helper case, fix. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* softmmu templates: optionally pass CPUState to memory access functionsBlue Swirl2012-03-1810-3/+430
| | | | | | | | | | | Optionally, make memory access helpers take a parameter for CPUState instead of relying on global env. On most targets, perform simple moves to reorder registers. On i386, switch from regparm(3) calling convention to standard stack-based version. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* i386: Remove REGPARMBlue Swirl2012-03-184-77/+58
| | | | | | | Use stack based calling convention (GCC default) for interfacing with generated code instead of register based convention (regparm(3)). Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* w64: Fix data type of next_tb and tcg_qemu_tb_execStefan Weil2012-03-172-2/+2
| | | | | | | | | | | | | | | | | | | next_tb is the numeric value of a tcg target (= QEMU host) address. Using tcg_target_ulong instead of unsigned long shows this and makes the code portable for hosts with an unusual size of long (w64). The type cast '(long)(next_tb & ~3)' was not needed (casting unsigned long to long does not change the bits, and nor does casting long to pointer for most (= all non w64) hosts. It is removed here. Macro or function tcg_qemu_tb_exec is used to set next_tb. The function also returns next_tb. Therefore tcg_qemu_tb_exec must return a tcg_target_ulong. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Fix large memory chunks allocation with tcg_malloc.Kirill Batuzov2012-03-172-6/+10
| | | | | | | | | | | | An attempt to allocate a large memory chunk after a small one resulted in circular links in list of pools. It caused the same memory being allocated twice for different arrays. Now pools for large memory chunks are kept in separate list and are freed during pool reset because current allocator can not reuse them. Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Rename CPUState -> CPUArchStateAndreas Färber2012-03-1411-40/+40
| | | | | | | | | | | | | Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
* tcg: Improve tcg_out_label and fix its usage for w64Stefan Weil2012-03-114-14/+14
| | | | | | | | | | | | | | | | tcg_out_label is always called with a third argument of pointer type which was casted to tcg_target_long. These casts can be avoided by changing the prototype of tcg_out_label. There was also a cast to long. For most hosts with sizeof(long) == sizeof(tcg_target_long) == sizeof(void *) this did not matter, but for w64 it was wrong. This is fixed now. Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* w64: fix type casts when calling flush_icache_rangeStefan Weil2012-03-031-4/+5
| | | | | Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* w64: Change data type of parameters for flush_icache_rangeStefan Weil2012-03-036-6/+13
| | | | | | | | | | | | | | | | The TCG targets i386 and tci needed a change of the function prototype for w64. This change is currently not needed for the other TCG targets, but it can be applied to avoid code differences. Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* w64: Fix data type of parameters for flush_icache_rangeStefan Weil2012-03-032-2/+4
| | | | | | | | | | | | | | | flush_icache_range takes two address parameters which must be large enough to address any address of the host. For hosts with sizeof(unsigned long) == sizeof(void *), this patch changes nothing. All currently supported hosts fall into this category. For w64 hosts, sizeof(unsigned long) is 4 while sizeof(void *) is 8, so the use of tcg_target_ulong is needed for i386 and tci (the tcg targets which work with w64). Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Rearrange definitions and include statementsStefan Weil2012-03-031-3/+3
| | | | | | | This change makes tcg_target_ulong available in tcg-target.h. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Remove unneeded include statementsStefan Weil2012-02-231-12/+0
| | | | | | | | | | | The standard include files are already included in qemu-common.h. malloc.h and alloca.h were needed for alloca() which was removed from TCG code some years ago when switching from dyngen to TCG (see commit 49516bc0d622112caac9df628caf19010fda8b67). Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* tcg-arm: fix a typo in commentsAurelien Jarno2012-01-131-1/+1
| | | | | | | | | ARM still doesn't support 16GB buffers in 32-bit modes, replace the 16GB by 16MB in the comment. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* tcg/arm: Use r6 as TCG_AREG0 to avoid clash with Thumb framepointerPeter Maydell2012-01-101-1/+1
| | | | | | | | | | On ARM, in Thumb mode r7 is used for the framepointer; this meant that we would fail to compile in debug mode because we were using r7 for TCG_AREG0. Shift to r6 instead to avoid this clash. (Bug reported as LP:870990.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
* tcg/arm: remove fixed map code buffer restrictionDr. David Alan Gilbert2011-12-141-19/+12
| | | | | | | | | | | On ARM, don't map the code buffer at a fixed location, and fix up the call/goto tcg routines to let it do long jumps. Mapping the code buffer at a fixed address could sometimes result in it being mapped over the top of the heap with pretty random results. Signed-off-by: Dr. David Alan Gilbert <david.gilbert@linaro.org> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
* tcg: make tcg_const_ptr actually accept a pointer argumentPeter Maydell2011-12-142-5/+5
| | | | | | | | | | Make tcg_const_ptr() include a cast so that you can pass it a pointer. This allows us to drop the casts we had in all the places that use this macro. Acked-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* tcg: Remove redundant declarations of TCG_TARGET_REG_BITSStefan Weil2011-12-091-5/+0
| | | | | | | TCG_TARGET_REG_BITS is declared in tcg.h for all TCG targets. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* fix spelling in tcg sub directoryDong Xu Wang2011-12-022-2/+2
| | | | | Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* tci: Make flush_icache_range() inlineStefan Weil2011-11-282-4/+4
| | | | | | | This is standard for other tcg targets and improves tci, too. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* tcg-sparc: Fix set-but-not used warnings.Richard Henderson2011-11-191-4/+0
| | | | | | | | | | | In both cases, val is computed, but then not used in the subsequent line, which then re-computes the quantity in a different type (int32_t vs unsigned long). Keep the computation type that's been working so far. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Merge branch 's390-1.0' of git://repo.or.cz/qemu/agrafBlue Swirl2011-11-1919-69/+73
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 's390-1.0' of git://repo.or.cz/qemu/agraf: s390x: initialize virtio dev region tcg: Use TCGReg for standard tcg-target entry points. tcg: Standardize on TCGReg as the enum for hard registers s390x: Add shutdown for TCG s390-virtio machine s390: Fix cpu shutdown for KVM s390: fix short kernel command lines s390: fix reset hypercall to reset the status s390x: implement SIGP restart and shutdown s390x: implement rrbe instruction properly s390x: update R and C bits in storage key s390x: make ipte 31-bit aware s390x: add ldeb instruction
| * tcg: Use TCGReg for standard tcg-target entry points.Richard Henderson2011-11-1410-52/+56
| | | | | | | | | | | | | | | | | | Including tcg_out_ld, tcg_out_st, tcg_out_mov, tcg_out_movi. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
| * tcg: Standardize on TCGReg as the enum for hard registersRichard Henderson2011-11-149-17/+17
| | | | | | | | | | | | | | | | | | Most targets did not name the enum; tci used TCGRegister. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* | tcg-ppc64: Fix compile errors for userspace only builds with gcc 4.6David Gibson2011-11-111-6/+8
|/ | | | | | | | | | | | tcg/ppc64/tcg-target.c has a couple of places where variables are set unconditionally, but otherwise used only for softmmu builds, not userspace only builds. This causes compiler warnings (which are fatal by default) when compiling for a ppc64 host with gcc 4.6. This patch fixes the problem by moving the code which defines and sets the variables into the CONFIG_SOFTMMU guarded regions. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* Merge branch 'tci' of git://qemu.weilnetz.de/qemuBlue Swirl2011-11-026-6/+1207
|\ | | | | | | | | | | | | | | | | | | * 'tci' of git://qemu.weilnetz.de/qemu: tcg: Add tcg interpreter to configure / make tcg: Add tci disassembler tcg: Add interpreter for bytecode tcg: Add bytecode generator for tcg interpreter tcg: Make ARRAY_SIZE(tcg_op_defs) globally available tcg: TCG targets may define tcg_qemu_tb_exec
| * tcg: Add bytecode generator for tcg interpreterStefan Weil2011-10-313-0/+1196
| | | | | | | | | | | | | | | | | | | | | | | | | | Unlike other tcg target code generators, this one does not generate machine code for some cpu. It generates machine independent bytecode which is interpreted later. This allows running QEMU on any host. Interpreted bytecode is slower than direct execution of generated machine code. Signed-off-by: Stefan Weil <sw@weilnetz.de>
| * tcg: Make ARRAY_SIZE(tcg_op_defs) globally availableStefan Weil2011-10-312-1/+3
| | | | | | | | | | | | | | | | | | tcg_op_defs was already a global array. The tci disassembler also needs ARRAY_SIZE(tcg_op_defs), so add a new global constant with this value. Signed-off-by: Stefan Weil <sw@weilnetz.de>
| * tcg: TCG targets may define tcg_qemu_tb_execStefan Weil2011-10-312-5/+8
| | | | | | | | | | | | | | | | | | | | Targets may use a non standard definition of tcg_tb_exec by defining this macro in their tcg_target.h. This is used here by ppc. It will be used by the TCG interpreter, too. Cc: malc <av1474@comtv.ru> Signed-off-by: Stefan Weil <sw@weilnetz.de>
* | tcg: Fix whitespace in tcg-op.h.Richard Henderson2011-11-021-4/+4
| | | | | | | | | | | | | | Removing the only tabs in the file. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: malc <av1474@comtv.ru>
* | tcg: Fix regression in tcg_gen_deposit_i64.Richard Henderson2011-11-021-0/+2
|/ | | | | | | | The error being caused by the failure to copy the other half of the input to the output after having narrowed the deposit operation. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: malc <av1474@comtv.ru>
* tcg: Optimize some forms of deposit.Richard Henderson2011-10-301-14/+51
| | | | | | | | | | | | | If the deposit replaces the entire word, optimize to a move. If we're inserting to the top of the word, avoid the mask of arg2 as we'll be shifting out all of the garbage and shifting in zeros. If the host is 32-bit, reduce a 64-bit deposit to a 32-bit deposit when possible. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Fix spelling in comment (varables -> variables)Stefan Weil2011-10-141-1/+1
| | | | | Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* tcg/s390: Remove unused tcg_out_addi()Peter Maydell2011-10-081-5/+0
| | | | | | | | | Remove the unused function tcg_out_addi() from the s390 TCG backend; this brings it into line with other backends. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg/ia64: Remove unused tcg_out_addi()Peter Maydell2011-10-081-19/+0
| | | | | | | | Remove the unused function tcg_out_addi() from the ia64 TCG backend; this brings it into line with other backends. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg-i386: Introduce limited deposit supportJan Kiszka2011-10-014-4/+40
| | | | | | | | | | | | x86 cannot provide an optimized generic deposit implementation. But at least for a few special cases, namely for writing bits 0..7, 8..15, and 0..15, versions using only a single instruction are feasible. Introducing such limited support improves emulating 16-bit x86 code on x86, but also rarer cases where 32-bit or 64-bit code accesses bytes or words. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg/arm: Remove unused tcg_out_addi()Peter Maydell2011-10-011-15/+0
| | | | | | | | | Remove the unused function tcg_out_addi() from the ARM TCG backend; this fixes a compilation failure on ARM hosts with newer gcc. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Add some assertionsStefan Weil2011-10-011-0/+2
| | | | | Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Add forward declarations for local functionsStefan Weil2011-10-011-0/+16
| | | | | | | | | | | These functions are defined in the tcg target specific file tcg-target.c. The forward declarations assert that every tcg target uses the same function prototype. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.hStefan Weil2011-10-018-21/+1
| | | | | | | | It is now declared for all tcg targets in tcg.h, so the tcg target specific declarations are redundant. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Declare TCG_TARGET_REG_BITS in tcg.hStefan Weil2011-10-011-0/+10
| | | | | | | | | | | TCG_TARGET_REG_BITS can be determined by the compiler, so there is no need to declare it for each individual tcg target. This is especially important for new tcg targets which will be supported by the tcg interpreter. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg/ppc64: Only one call output register needed for 64 bit hostsStefan Weil2011-09-171-1/+1
| | | | | | | | | The second register is only needed for 32 bit hosts. Cc: Vassili Karpov <av1474@comtv.ru> Fine-with-me'd-by: Vassili Karpov <av1474@comtv.ru> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg/sparc: Only one call output register needed for 64 bit hostsStefan Weil2011-09-171-2/+4
| | | | | | | | The second register is only needed for 32 bit hosts. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg/s390: Only one call output register needed for 64 bit hostsStefan Weil2011-09-171-1/+3
| | | | | | | | | The second register is only needed for 32 bit hosts. Cc: Alexander Graf <agraf@suse.de> Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg/ia64: Only one call output register needed for 64 bit hostsStefan Weil2011-09-171-3/+2
| | | | | | | | The second register is never used for ia64 hosts. Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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