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* arm: Don't potentially overwrite input registers in add2, sub2.balrog2008-12-011-4/+13
| | | | | | | | | According to malc TCG will often genereate an add2/sub2/mul2 with low half of the output in the same register as high half of one of the inputs, so account for that. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5847 c046a42c-6fe2-441c-8c8c-71466251a162
* Don't rely on ARM tcg_out_goto() generating just a single insn.balrog2008-12-011-8/+13
| | | | | | | | | | | Otherwise when tb_exit generates a jump beyond the pc-relative range, tcg_out_goto() spans two/three instructions and we load the tb return value from a wrong address. This is #ifdefed out currently because we take care for the jumps to be local. Problem spotted by Steffen Liebergeld. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5845 c046a42c-6fe2-441c-8c8c-71466251a162
* Use libgcc __clear_cache to clean icache, when available.balrog2008-12-011-0/+5
| | | | | | | | Calling the clear cache syscall directly generates an illegal instruction on some (armv4) kernels. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5843 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix alignment of 64bit argsmalc2008-11-291-1/+2
| | | | | | Unbreaks sparc and mips64el. (Reported by Thiemo Seufer) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5815 c046a42c-6fe2-441c-8c8c-71466251a162
* Preliminary AIX supportmalc2008-11-183-2/+55
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5732 c046a42c-6fe2-441c-8c8c-71466251a162
* TCG variable type checking.pbrook2008-11-173-853/+1034
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
* Rename misnamed BACK_CHAIN_OFFSET to LR_OFFSETmalc2008-11-121-4/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5711 c046a42c-6fe2-441c-8c8c-71466251a162
* Avoid compiler warningmalc2008-11-121-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5710 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix alignment problem with some 64bit load/store instructionsmalc2008-11-111-5/+16
| | | | | | | | | LD/STD/LWA require displacement to be multiple of 4, provide tcg_out_ldsta which checks the supplied displacement and falls back on indexed variant when the check fails. All uses of LD/STD/LWA outside of tcg_out_ldst appear to be safe. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5670 c046a42c-6fe2-441c-8c8c-71466251a162
* Mention output overlaps.pbrook2008-11-041-0/+5
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5619 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix rotri_i64 typo.pbrook2008-11-031-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5609 c046a42c-6fe2-441c-8c8c-71466251a162
* tcg-ops.h: add rotl/rotli and rotr/rotri TCG instructionsaurel322008-11-032-1/+127
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5607 c046a42c-6fe2-441c-8c8c-71466251a162
* tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targetsaurel322008-11-031-15/+15
| | | | | | | | | Use the same order as the _i32 version (pure code move). Suggested by Laurent Laurent Desnogues. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5606 c046a42c-6fe2-441c-8c8c-71466251a162
* 64-bit target subfi fix.pbrook2008-11-021-1/+1
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5602 c046a42c-6fe2-441c-8c8c-71466251a162
* tcg-ops.h: add a subfi wrapperaurel322008-11-021-0/+16
| | | | | | | | Add a subfi (subtract from immediate) wrapper, useful for the PPC target. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5599 c046a42c-6fe2-441c-8c8c-71466251a162
* tcg-ops.h: _i64 TCG immediate instructions cleanupaurel322008-11-021-42/+31
| | | | | | | | | | | Move addi_i64, muli_i64 and subi_i64 out of #if TCG_TARGET_REG_BITS as both implementations are strictly identical. Use the same optimisation (ie when imm == 0) for addi_i64 and subi_64 than the 32-bit version. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5598 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix undeclared symbol warnings from sparseblueswir12008-10-261-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
* TCG: add tcg_const_local_tl()aurel322008-10-213-0/+20
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5504 c046a42c-6fe2-441c-8c8c-71466251a162
* TCG: add logical operations found on alpha and powerpc processorsaurel322008-10-212-0/+120
| | | | | | | | | | | | - andc_i32/i64 t0, t1, t2 - eqv_i32/i64 t0, t1, t2 - nand_i32/i64 t0, t1, t2 - nor_i32/i64 t0, t1, t2 - orc_i32/i64 t0, t1, t2 Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5501 c046a42c-6fe2-441c-8c8c-71466251a162
* Add some missing static and const qualifiers, reg_names only used if NDEBUG setblueswir12008-10-057-15/+32
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5421 c046a42c-6fe2-441c-8c8c-71466251a162
* Optimize 64 bit bswapmalc2008-10-021-5/+5
| | | | | | | Use rldimi instead of rldicr/or pair, saves us one instruction. Suggested by Hollis Blanchard. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5404 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix tcg_gen_concat32_i64 on 64-bit hosts.pbrook2008-09-231-1/+2
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5306 c046a42c-6fe2-441c-8c8c-71466251a162
* Avoid clobbering input register in qemu_ld64+bswap+useronly casemalc2008-09-221-13/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5287 c046a42c-6fe2-441c-8c8c-71466251a162
* Add concat32_i64 and concat_tl_i64 opsblueswir12008-09-212-0/+18
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5282 c046a42c-6fe2-441c-8c8c-71466251a162
* Add concat_i32_i64 op.pbrook2008-09-212-0/+21
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162
* Display TCGCond name in tcg dumper (original patch by Tristan Gingold)blueswir12008-09-141-1/+30
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5208 c046a42c-6fe2-441c-8c8c-71466251a162
* Use 64 bit loads for tlb addend only if addend size is 64 bitsblueswir12008-09-131-2/+8
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5203 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix stack alignment on Sparc32 hostblueswir12008-09-131-1/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5202 c046a42c-6fe2-441c-8c8c-71466251a162
* TCG: Use x86-64 zero extension instructions.pbrook2008-09-071-0/+15
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5180 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement TCG sign extension ops for x86-64.pbrook2008-09-072-0/+27
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5179 c046a42c-6fe2-441c-8c8c-71466251a162
* Revert "TCG: enable debug"aurel322008-09-051-1/+1
| | | | | | This reverts commit 5166, commited by error. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5169 c046a42c-6fe2-441c-8c8c-71466251a162
* TCG: enable debugaurel322008-09-051-1/+1
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5166 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix some warnings that would be generated by gcc -Wredundant-declsblueswir12008-08-307-63/+12
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
* Relax qemu_ld/st constraints for !SOFTMMU casemalc2008-08-211-1/+14
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5038 c046a42c-6fe2-441c-8c8c-71466251a162
* Relax qemu_ld/st constraints for !SOFTMMU casemalc2008-08-201-2/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5034 c046a42c-6fe2-441c-8c8c-71466251a162
* Avoid clobbering input/aliased registers in !SOFTMMU+64bit+bswap casemalc2008-08-201-9/+10
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5033 c046a42c-6fe2-441c-8c8c-71466251a162
* Clear the upper 32 bits of addr_reg in TARGET_LONG_BITS == 32 casemalc2008-08-201-0/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5032 c046a42c-6fe2-441c-8c8c-71466251a162
* Move tcg_out_tlb_read into #ifdef CONFIG_SOFTMMU block to avoid compiler warningmalc2008-08-201-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5031 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix some warnings that would be generated by gcc -Wmissing-prototypesblueswir12008-08-172-17/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5022 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix 64 bit constant generationblueswir12008-08-171-5/+12
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5020 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix 32 bit address overflowblueswir12008-08-171-0/+19
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5019 c046a42c-6fe2-441c-8c8c-71466251a162
* Restore AREG0 after callsblueswir12008-08-171-73/+64
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5018 c046a42c-6fe2-441c-8c8c-71466251a162
* Sparc code generator update (fix qemu_ld & qemu_st)blueswir12008-08-161-129/+101
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5014 c046a42c-6fe2-441c-8c8c-71466251a162
* Sparc code generator updateblueswir12008-08-152-96/+149
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5009 c046a42c-6fe2-441c-8c8c-71466251a162
* Account for MacOS X ABI reserved space in linkage area (Andreas Faerber)malc2008-08-032-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4985 c046a42c-6fe2-441c-8c8c-71466251a162
* Preliminary MacOS X on PPC32 supportmalc2008-08-032-10/+41
| | | | | | Big thanks to BlueSwirl for Sparc failure analysis. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4984 c046a42c-6fe2-441c-8c8c-71466251a162
* On ppc32 make tb_set_jmp_target1 behave like it does on a ppc64malc2008-07-291-0/+31
| | | | | | | | Avoids nasty warnings about flush_icache_range from gcc4 and inability to compile [cpu-]exec.c with gcc3 and -O, also the function is much too large to be candidate for inlining anyway. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4974 c046a42c-6fe2-441c-8c8c-71466251a162
* Immediate versions of some operationsmalc2008-07-281-27/+57
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4962 c046a42c-6fe2-441c-8c8c-71466251a162
* Do not try handle "special" arguments of and/or/xor/shl/shr, upper level does itmalc2008-07-282-128/+76
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4961 c046a42c-6fe2-441c-8c8c-71466251a162
* Set the L field of CMP[L][I] when dealing with 64 bit quantitiesmalc2008-07-281-7/+12
| | | | | | This (along with previous 2 commits) makes X86_64 work on ppc64 too. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4960 c046a42c-6fe2-441c-8c8c-71466251a162
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