summaryrefslogtreecommitdiffstats
path: root/tcg
Commit message (Expand)AuthorAgeFilesLines
* arm: Don't potentially overwrite input registers in add2, sub2.balrog2008-12-011-4/+13
* Don't rely on ARM tcg_out_goto() generating just a single insn.balrog2008-12-011-8/+13
* Use libgcc __clear_cache to clean icache, when available.balrog2008-12-011-0/+5
* Fix alignment of 64bit argsmalc2008-11-291-1/+2
* Preliminary AIX supportmalc2008-11-183-2/+55
* TCG variable type checking.pbrook2008-11-173-853/+1034
* Rename misnamed BACK_CHAIN_OFFSET to LR_OFFSETmalc2008-11-121-4/+4
* Avoid compiler warningmalc2008-11-121-1/+1
* Fix alignment problem with some 64bit load/store instructionsmalc2008-11-111-5/+16
* Mention output overlaps.pbrook2008-11-041-0/+5
* Fix rotri_i64 typo.pbrook2008-11-031-1/+1
* tcg-ops.h: add rotl/rotli and rotr/rotri TCG instructionsaurel322008-11-032-1/+127
* tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targetsaurel322008-11-031-15/+15
* 64-bit target subfi fix.pbrook2008-11-021-1/+1
* tcg-ops.h: add a subfi wrapperaurel322008-11-021-0/+16
* tcg-ops.h: _i64 TCG immediate instructions cleanupaurel322008-11-021-42/+31
* Fix undeclared symbol warnings from sparseblueswir12008-10-261-2/+2
* TCG: add tcg_const_local_tl()aurel322008-10-213-0/+20
* TCG: add logical operations found on alpha and powerpc processorsaurel322008-10-212-0/+120
* Add some missing static and const qualifiers, reg_names only used if NDEBUG setblueswir12008-10-057-15/+32
* Optimize 64 bit bswapmalc2008-10-021-5/+5
* Fix tcg_gen_concat32_i64 on 64-bit hosts.pbrook2008-09-231-1/+2
* Avoid clobbering input register in qemu_ld64+bswap+useronly casemalc2008-09-221-13/+6
* Add concat32_i64 and concat_tl_i64 opsblueswir12008-09-212-0/+18
* Add concat_i32_i64 op.pbrook2008-09-212-0/+21
* Display TCGCond name in tcg dumper (original patch by Tristan Gingold)blueswir12008-09-141-1/+30
* Use 64 bit loads for tlb addend only if addend size is 64 bitsblueswir12008-09-131-2/+8
* Fix stack alignment on Sparc32 hostblueswir12008-09-131-1/+2
* TCG: Use x86-64 zero extension instructions.pbrook2008-09-071-0/+15
* Implement TCG sign extension ops for x86-64.pbrook2008-09-072-0/+27
* Revert "TCG: enable debug"aurel322008-09-051-1/+1
* TCG: enable debugaurel322008-09-051-1/+1
* Fix some warnings that would be generated by gcc -Wredundant-declsblueswir12008-08-307-63/+12
* Relax qemu_ld/st constraints for !SOFTMMU casemalc2008-08-211-1/+14
* Relax qemu_ld/st constraints for !SOFTMMU casemalc2008-08-201-2/+6
* Avoid clobbering input/aliased registers in !SOFTMMU+64bit+bswap casemalc2008-08-201-9/+10
* Clear the upper 32 bits of addr_reg in TARGET_LONG_BITS == 32 casemalc2008-08-201-0/+6
* Move tcg_out_tlb_read into #ifdef CONFIG_SOFTMMU block to avoid compiler warningmalc2008-08-201-1/+1
* Fix some warnings that would be generated by gcc -Wmissing-prototypesblueswir12008-08-172-17/+4
* Fix 64 bit constant generationblueswir12008-08-171-5/+12
* Fix 32 bit address overflowblueswir12008-08-171-0/+19
* Restore AREG0 after callsblueswir12008-08-171-73/+64
* Sparc code generator update (fix qemu_ld & qemu_st)blueswir12008-08-161-129/+101
* Sparc code generator updateblueswir12008-08-152-96/+149
* Account for MacOS X ABI reserved space in linkage area (Andreas Faerber)malc2008-08-032-2/+2
* Preliminary MacOS X on PPC32 supportmalc2008-08-032-10/+41
* On ppc32 make tb_set_jmp_target1 behave like it does on a ppc64malc2008-07-291-0/+31
* Immediate versions of some operationsmalc2008-07-281-27/+57
* Do not try handle "special" arguments of and/or/xor/shl/shr, upper level does itmalc2008-07-282-128/+76
* Set the L field of CMP[L][I] when dealing with 64 bit quantitiesmalc2008-07-281-7/+12
OpenPOWER on IntegriCloud