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* tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.hStefan Weil2011-10-011-6/+0
* tcg/sparc: Only one call output register needed for 64 bit hostsStefan Weil2011-09-171-2/+4
* tcg: Always define all of the TCGOpcode enum members.Richard Henderson2011-08-211-33/+35
* TCG/Sparc64: use stack for TCG tempsBlue Swirl2011-06-261-3/+4
* Delegate setup of TCG temporaries to targetsBlue Swirl2011-06-261-0/+2
* cpu-exec.c: avoid AREG0 useBlue Swirl2011-06-261-2/+2
* tcg: Optionally sign-extend 32-bit arguments for 64-bit hosts.Richard Henderson2010-06-161-0/+4
* tcg: Make some tcg-target.c routines static.Richard Henderson2010-06-091-2/+2
* tcg: Add TYPE parameter to tcg_out_mov.Richard Henderson2010-06-091-5/+5
* Split TLB addend and target_phys_addr_tPaul Brook2010-04-051-7/+1
* tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.Richard Henderson2010-03-261-1/+5
* tcg: Allow target-specific implementation of NOR.Richard Henderson2010-03-261-0/+2
* tcg: Allow target-specific implementation of NAND.Richard Henderson2010-03-261-0/+2
* tcg: Allow target-specific implementation of EQV.Richard Henderson2010-03-261-0/+2
* tcg: Use TCGCond where appropriate.Richard Henderson2010-03-261-6/+6
* tcg: Name the opcode enumeration.Richard Henderson2010-03-261-1/+1
* remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]Paolo Bonzini2010-03-261-7/+1
* Fix Sparc host build breakageBlue Swirl2010-03-131-0/+8
* tcg: fix build on 32-bit hppa, ppc and sparc hostsJay Foad2010-02-221-0/+4
* tcg: Add comments for all optional instructions not implemented.Richard Henderson2010-02-201-6/+16
* tcg-sparc: Implement ORC.Richard Henderson2010-02-202-0/+7
* tcg-sparc: Implement ANDC.Richard Henderson2010-02-202-0/+8
* tcg-sparc: Implement not.Richard Henderson2010-02-202-0/+8
* tcg-sparc: Implement neg.Richard Henderson2010-02-202-2/+16
* tcg-sparc: Implement setcond, setcond2.Richard Henderson2010-02-161-0/+127
* tcg-sparc: Implement ext32[su]_i64Richard Henderson2010-01-122-0/+21
* tcg-sparc: Implement division properly.Richard Henderson2010-01-122-30/+55
* tcg-sparc: Do not remove %o[012] from 'r' constraint.Richard Henderson2010-01-121-0/+3
* tcg-sparc: Implement add2, sub2, mulu2.Richard Henderson2010-01-121-0/+27
* tcg-sparc: Add tcg_out_arithc.Richard Henderson2010-01-121-43/+43
* tcg-sparc: Implement brcond2.Richard Henderson2009-12-211-14/+69
* tcg-sparc: Use TCG_TARGET_REG_BITS in conditional compilation.Richard Henderson2009-12-211-16/+16
* tcg-sparc: Improve tcg_out_movi for sparc64.Richard Henderson2009-12-211-12/+15
* tcg-sparc: Fix imm13 check in movi.Richard Henderson2009-12-211-1/+1
* change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION}Juan Quintela2009-07-271-1/+1
* Fix branches and TLB matches for 64 bit targetsblueswir12009-04-041-13/+75
* Allocate space for static call args, increase stack frame size on Sparc64blueswir12009-04-042-9/+17
* tcg: rename bswap_i32/i64 functionsaurel322009-03-131-2/+2
* Prune unused TCG_AREGsblueswir12009-03-081-3/+0
* Add some missing static and const qualifiers, reg_names only used if NDEBUG setblueswir12008-10-051-0/+2
* Use 64 bit loads for tlb addend only if addend size is 64 bitsblueswir12008-09-131-2/+8
* Fix stack alignment on Sparc32 hostblueswir12008-09-131-1/+2
* Fix some warnings that would be generated by gcc -Wredundant-declsblueswir12008-08-301-9/+1
* Fix 64 bit constant generationblueswir12008-08-171-5/+12
* Fix 32 bit address overflowblueswir12008-08-171-0/+19
* Restore AREG0 after callsblueswir12008-08-171-73/+64
* Sparc code generator update (fix qemu_ld & qemu_st)blueswir12008-08-161-129/+101
* Sparc code generator updateblueswir12008-08-152-96/+149
* Try to avoid glibc global register mangling, againblueswir12008-07-262-20/+38
* Fix 64 bit constant generationblueswir12008-07-071-4/+6
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