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path: root/tcg/sparc/tcg-target.h
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* tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITSPaolo Bonzini2015-06-031-0/+1
* tcg-sparc: Use UMULXHI instructionRichard Henderson2014-09-291-1/+1
* tcg-sparc: Use ADDXC in addsub2_i64Richard Henderson2014-09-291-0/+6
* tcg-sparc: Support addsub2_i64Richard Henderson2014-09-291-2/+2
* tcg: Remove TCG_TARGET_HAS_new_ldstRichard Henderson2014-06-041-2/+0
* tcg-sparc: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2014-05-121-0/+1
* tcg-sparc: Implement muls2_i32Richard Henderson2014-04-281-1/+1
* tcg-sparc: Use 64-bit registers with sparcv8plusRichard Henderson2014-04-281-11/+3
* tcg-sparc: Support trunc_shr_i32Richard Henderson2014-04-281-1/+1
* tcg: Add INDEX_op_trunc_shr_i32Richard Henderson2014-04-281-0/+1
* tcg: Use HOST_WORDS_BIGENDIANRichard Henderson2014-04-181-2/+0
* tcg-sparc: Convert to new ldst opcodesRichard Henderson2014-03-171-1/+1
* tcg-sparc: Don't handle remainderRichard Henderson2014-03-171-2/+2
* tcg: Add qemu_ld_st_i32/64Richard Henderson2013-10-101-0/+2
* tcg-sparc: Fix parenthesis warningRichard Henderson2013-09-201-1/+1
* tcg: Allow TCG_TARGET_REG_BITS to be specified independantlyRichard Henderson2013-09-021-0/+8
* tcg: Change flush_icache_range arguments to uintptr_tRichard Henderson2013-09-021-8/+4
* tcg: Add muluh and mulsh opcodesRichard Henderson2013-09-021-0/+4
* tcg: Split rem requirement from div requirementRichard Henderson2013-07-091-0/+2
* tcg: Add signed multiword multiplication operationsRichard Henderson2013-02-231-0/+2
* tcg: Add 64-bit multiword arithmetic operationsRichard Henderson2013-02-231-0/+3
* tcg-sparc: Always implement 32-bit multiword opsRichard Henderson2013-02-231-4/+3
* tcg: Make 32-bit multiword operations optional for 64-bit hostsRichard Henderson2013-02-231-0/+4
* janitor: add guards to headersPaolo Bonzini2012-12-191-0/+3
* Merge branch 'linux-user-for-upstream' of git://git.linaro.org/people/rikuvoi...Aurelien Jarno2012-10-191-2/+0
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| * tcg: Remove TCG_TARGET_HAS_GUEST_BASE definePeter Maydell2012-10-121-2/+0
* | tcg-sparc: Use Z constraint for %g0Richard Henderson2012-10-131-2/+3
* | tcg-sparc: Implement movcond.Richard Henderson2012-10-131-2/+2
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* tcg-sparc: Clean up cruft stemming from attempts to use global registers.Richard Henderson2012-09-211-11/+7
* tcg-sparc: Change AREG0 in generated code to %i0.Richard Henderson2012-09-211-7/+1
* tcg-sparc: Support GUEST_BASE.Richard Henderson2012-09-211-0/+2
* tcg-sparc: Assume v9 cpu always, i.e. force v8plus in 32-bit mode.Richard Henderson2012-09-211-3/+4
* tcg: Introduce movcondRichard Henderson2012-09-211-0/+2
* Remove unused CONFIG_TCG_PASS_AREG0 and dead codeBlue Swirl2012-09-151-1/+0
* w64: Change data type of parameters for flush_icache_rangeStefan Weil2012-03-031-1/+2
* tcg: Standardize on TCGReg as the enum for hard registersRichard Henderson2011-11-141-2/+2
* tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.hStefan Weil2011-10-011-6/+0
* tcg: Always define all of the TCGOpcode enum members.Richard Henderson2011-08-211-33/+35
* tcg: Optionally sign-extend 32-bit arguments for 64-bit hosts.Richard Henderson2010-06-161-0/+4
* tcg: Allow target-specific implementation of NOR.Richard Henderson2010-03-261-0/+2
* tcg: Allow target-specific implementation of NAND.Richard Henderson2010-03-261-0/+2
* tcg: Allow target-specific implementation of EQV.Richard Henderson2010-03-261-0/+2
* remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]Paolo Bonzini2010-03-261-7/+1
* tcg: Add comments for all optional instructions not implemented.Richard Henderson2010-02-201-6/+16
* tcg-sparc: Implement ORC.Richard Henderson2010-02-201-0/+2
* tcg-sparc: Implement ANDC.Richard Henderson2010-02-201-0/+2
* tcg-sparc: Implement not.Richard Henderson2010-02-201-0/+2
* tcg-sparc: Implement neg.Richard Henderson2010-02-201-2/+3
* tcg-sparc: Implement ext32[su]_i64Richard Henderson2010-01-121-0/+5
* tcg-sparc: Implement division properly.Richard Henderson2010-01-121-0/+3
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