index
:
hqemu
2.5.1_overlay
2.5_overlay
2.6_overlay
master
HQEMU
Raptor Engineering, LLC
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
tcg
/
ppc
Commit message (
Expand
)
Author
Age
Files
Lines
...
*
tcg: Allow target-specific implementation of NOR.
Richard Henderson
2010-03-26
1
-0
/
+1
*
tcg: Allow target-specific implementation of NAND.
Richard Henderson
2010-03-26
1
-0
/
+1
*
tcg: Allow target-specific implementation of EQV.
Richard Henderson
2010-03-26
1
-0
/
+1
*
tcg: Use TCGCond where appropriate.
Richard Henderson
2010-03-26
1
-3
/
+4
*
tcg: Name the opcode enumeration.
Richard Henderson
2010-03-26
1
-1
/
+1
*
remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]
Paolo Bonzini
2010-03-26
1
-2
/
+0
*
tcg/ppc[64]: Only define addend load helpers in softmmu case
malc
2010-03-13
1
-0
/
+3
*
tcg/ppc: Fix right rotation
malc
2010-02-27
1
-1
/
+2
*
tcg/ppc: Fix typo
malc
2010-02-23
1
-1
/
+1
*
tcg/ppc: Implement some of the optional ops
malc
2010-02-22
2
-8
/
+88
*
tcg: fix build on 32-bit hppa, ppc and sparc hosts
Jay Foad
2010-02-22
1
-2
/
+0
*
tcg: Add comments for all optional instructions not implemented.
Richard Henderson
2010-02-20
1
-1
/
+9
*
tcg/ppc: Consistently use calling convention selection macros
malc
2010-02-20
1
-12
/
+12
*
Use ppc host calling convention definitions to set TCG_TARGET_CALL_{ALIGN_ARG...
Juergen Lock
2010-02-20
1
-3
/
+3
*
tcg/ppc32: proper setcond implementation
malc
2010-02-07
1
-25
/
+25
*
tcg/ppc32: implement setcond[2]
malc
2010-02-07
1
-14
/
+157
*
tcg/ppc: always use tcg_out_call
malc
2009-09-27
1
-20
/
+10
*
When targeting PPU use rlwinm instead of andi. if possible
malc
2009-09-06
1
-8
/
+54
*
Fix rbase initialization
malc
2009-07-20
1
-1
/
+1
*
PPC 32/64 GUEST_BASE support
malc
2009-07-18
2
-21
/
+65
*
Fix LHZX opcode value
malc
2009-07-18
1
-1
/
+1
*
Whack [LS]MW
malc
2009-04-11
1
-3
/
+0
*
Remove reserved registers from tcg_target_reg_alloc_order
malc
2009-04-11
1
-3
/
+0
*
Prune unused TCG_AREGs
blueswir1
2009-03-08
1
-1
/
+0
*
Add missing r24..r26 to calle save registers
malc
2009-02-11
1
-0
/
+5
*
R13 is reserved for small data area pointer by SVR4 PPC ABI
malc
2009-01-26
1
-0
/
+5
*
Use the ARRAY_SIZE() macro where appropriate.
malc
2008-12-22
1
-1
/
+1
*
Introduce and use cache-utils.[ch]
malc
2008-12-10
1
-21
/
+0
*
Preliminary AIX support
malc
2008-11-18
2
-2
/
+52
*
Rename misnamed BACK_CHAIN_OFFSET to LR_OFFSET
malc
2008-11-12
1
-4
/
+4
*
Add some missing static and const qualifiers, reg_names only used if NDEBUG set
blueswir1
2008-10-05
1
-0
/
+2
*
Avoid clobbering input register in qemu_ld64+bswap+useronly case
malc
2008-09-22
1
-13
/
+6
*
Fix some warnings that would be generated by gcc -Wredundant-decls
blueswir1
2008-08-30
1
-9
/
+2
*
Relax qemu_ld/st constraints for !SOFTMMU case
malc
2008-08-21
1
-1
/
+14
*
Account for MacOS X ABI reserved space in linkage area (Andreas Faerber)
malc
2008-08-03
2
-2
/
+2
*
Preliminary MacOS X on PPC32 support
malc
2008-08-03
2
-10
/
+41
*
On ppc32 make tb_set_jmp_target1 behave like it does on a ppc64
malc
2008-07-29
1
-0
/
+31
*
Do not try handle "special" arguments of and/or/xor/shl/shr, upper level does it
malc
2008-07-28
1
-64
/
+38
*
Provide extNs_M instructions
malc
2008-07-23
2
-0
/
+12
*
Fuse EQ and NE handling in tcg_out_brcond2
malc
2008-07-03
1
-7
/
+4
*
Mask LL portion of B to 24 bits in tcg_out_b (Thanks to Thiemo Seufer)
malc
2008-07-03
1
-1
/
+1
*
According to gcc-4.3.0/gcc/config/rs6000/crtsavres.asm R13 is volatile
malc
2008-06-23
1
-1
/
+0
*
Shuffle contents of tcg_target_reg_alloc_order
malc
2008-06-23
1
-18
/
+18
*
Save LR into proper place on callers stack frame
malc
2008-06-18
1
-2
/
+2
*
Reimplement brcond2 and refactor brcond
malc
2008-06-12
1
-51
/
+52
*
Remove stray variable
malc
2008-06-10
1
-1
/
+1
*
Use rem/div[u]_i32 drop div[u]2_i32
malc
2008-06-09
2
-113
/
+26
*
Emit trampolines manually in prologue
malc
2008-06-09
1
-38
/
+80
*
Fix test for signed div fast path
malc
2008-06-09
1
-1
/
+7
*
Fix div[u]2.
malc
2008-06-09
1
-26
/
+65
[prev]
[next]