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* tcg-ppc: Rename the tcg/ppc64 backendRichard Henderson2014-06-231-2540/+0
| | | | | | | | The other tcg backends that support 32- and 64-bit modes use the 32-bit name for the port. Follow suit. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Merge ppc32 shiftsRichard Henderson2014-06-231-8/+32
| | | | | Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Support mulsh_i32Richard Henderson2014-06-231-0/+5
| | | | | Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Merge ppc32 register usageRichard Henderson2014-06-231-22/+39
| | | | | | | Good enough to run some instructions before things go awry. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Merge ppc32 qemu_ld/stRichard Henderson2014-06-231-84/+209
| | | | | Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Merge ppc32 brcond2, setcond2, muluhRichard Henderson2014-06-231-1/+95
| | | | | | | | Now passes tcg_add_target_add_op_defs assertions, but not complete enough to function. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Begin merging ppc32 with ppc64Richard Henderson2014-06-231-37/+67
| | | | | | | | Just enough to compile, assuming you edit config-host.mak manually. It will still abort at runtime, due to missing brcond2, setcond2, mulu2. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Fix sub2 implementationRichard Henderson2014-06-231-7/+7
| | | | | | | All sorts of confusion on argument ordering. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Merge 32-bit ABIs into the prologue / frame codeRichard Henderson2014-06-231-7/+32
| | | | | Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Adjust tcg_out_call for ELFv2Ulrich Weigand2014-06-231-0/+17
| | | | | | | | | | | | | | The new ELFv2 ABI, used by default on powerpc64le-linux hosts, introduced some changes that are incompatible with code currently generated by the ppc64 TGC target. In particular, we no longer use function descriptors. This patch adds support for the ELFv2 ABI in the ppc64 TGC function call and function prologue sequences. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Ulrich Weigand <ulrich.weigand@de.ibm.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Support the ppc64 elfv2 ABIRichard Henderson2014-06-231-0/+4
| | | | | Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Use the correct test in tcg_out_callRichard Henderson2014-06-231-3/+3
| | | | | | | The correct test uses the _CALL_AIX macro, not a host-specific macro. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Better parameterize the stack frameRichard Henderson2014-06-231-28/+36
| | | | | | | In preparation for supporting other ABIs. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Fix TCG_TARGET_CALL_STACK_OFFSETRichard Henderson2014-06-231-1/+1
| | | | | | | | | The calling convention reserves space for the 8 register parameters on the stack, so using only 6*8=48 as the offset was wrong. We never saw this bug because we don't have any helpers with more than 5 parameters. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Move call macros out of tcg-target.hRichard Henderson2014-06-231-0/+5
| | | | | | | | These values are private to tcg.c; we don't need to expose this nonsense to the translators. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Use tcg_out_{ld,st,cmp} internallyRichard Henderson2014-06-231-19/+14
| | | | | | | | Rather than using tcg_out32 and opcodes directly. This allows us to remove LD_ADDR and CMP_L macros. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Relax register restrictions in tcg_out_mem_longRichard Henderson2014-06-231-5/+7
| | | | | | | | In order to be able to use tcg_out_ld/st sensibly with scratch registers, assert only when we'd incorrectly clobber a scratch. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Move functions aroundRichard Henderson2014-06-231-361/+361
| | | | | | | | Code movement only. This will allow us to make use of the other tcg_out_* functions in tidying their implementations. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Avoid some hard-codings of TCG_TYPE_I64Richard Henderson2014-06-231-10/+13
| | | | | | | Using more appropriate _PTR or _REG where possible. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Remove unreachable code in tcg_out_op and op_defsRichard Henderson2014-05-121-28/+5
| | | | | | | | | | | The INDEX_op_call case has just been obsoleted; the mov and movi cases have not been reachable for years. Attempt to document this both in each tcg_out_op switch, and via TCG_OPF_NOT_PRESENT. Because of the TCG_OPF_NOT_PRESENT change, this must be done for all targets in a single commit. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Rename tcg_out_calli to tcg_out_callRichard Henderson2014-05-121-21/+16
| | | | | | Merge the existing tcg_out_call into tcg_out_op. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2014-05-121-84/+80
| | | | | | | And use tcg pointer differencing functions as appropriate. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Use the type parameter to tcg_target_const_matchRichard Henderson2014-04-181-1/+9
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Add TCGType parameter to tcg_target_const_matchRichard Henderson2014-04-181-1/+1
| | | | | | | | Most 64-bit targets need to be able to ignore the high bits of a TCG_TYPE_I32 value. Suggested-by: Stuart Brady <sdb@zubnet.me.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Use qemu_getauxvalRichard Henderson2013-11-301-9/+2
| | | | | | | Allow host detection on linux systems without glibc 2.16 or later. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Support new ldst opcodesRichard Henderson2013-10-121-61/+16
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Convert to le/be ldst helpersRichard Henderson2013-10-121-16/+22
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Use TCGMemOp within qemu_ldst routinesRichard Henderson2013-10-121-39/+45
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Add tcg-be-ldst.hRichard Henderson2013-10-101-23/+3
| | | | | | Move TCGLabelQemuLdst and related stuff out of tcg.h. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Implement CONFIG_QEMU_LDST_OPTIMIZATIONRichard Henderson2013-09-251-77/+135
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Add _noaddr functions for emitting forward branchesRichard Henderson2013-09-251-10/+16
| | | | | | ... rather than open-coding this stuff through the file. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Streamline tcg_out_tlb_readRichard Henderson2013-09-251-97/+97
| | | | | | | | | | Less conditional compilation. Merge an add insn with the indexed memory load insn. Load the tlb addend earlier. Avoid the address update memory form. Fix a bug in not allowing large enough tlb offsets for some guests. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Implement tcg_register_jitRichard Henderson2013-09-251-23/+73
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Handle long offsets betterRichard Henderson2013-09-251-73/+74
| | | | | | | | | | | | | | Previously we'd only handle 16-bit offsets from memory operand without falling back to indexed, but it's easy to use ADDIS to handle full 32-bit offsets. This also lets us unify code that existed inline in tcg_out_op for handling addition of large constants. The new R2 temporary was marked reserved for the AIX calling convention, but the register really is call-clobbered and since tcg generated code has no use for a TOC, it's available for use. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Tidy register allocation orderRichard Henderson2013-09-251-27/+22
| | | | | | | | | | | | | | | Remove conditionalization from tcg_target_reg_alloc_order, relying on reserved_regs to prevent register allocation that shouldn't happen. So R11 is now present in reg_alloc_order for __APPLE__, but also now reserved. Sort reg_alloc_order into call-saved, call-clobbered, and parameters. This reduces the effect of values getting spilled and reloaded before function calls. Whether or not it is reserved, R2 (TOC) is always call-clobbered. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Look through a constant function descriptorRichard Henderson2013-09-251-4/+19
| | | | | | | Especially in the user-only configurations, a direct branch into the executable may be in range. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Fold constant call address into descriptor loadRichard Henderson2013-09-251-3/+11
| | | | | | | | | | | | | | | Eliminates one insn per call: : lis r2,4165 -: ori r2,r2,59616 -: ld r0,0(r2) +: ld r0,-5920(r2) : mtctr r0 -: ld r2,8(r2) +: ld r2,-5912(r2) : bctrl Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Don't load the static chain from TCGRichard Henderson2013-09-251-1/+0
| | | | | | There are no helpers that require the static chain. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Avoid code for nop moveRichard Henderson2013-09-251-1/+3
| | | | | | | While these are rare from code that's been through the optimizer, it's not uncommon within the tcg backend. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Use tcg_out64Richard Henderson2013-09-251-5/+1
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Use TCG_REG_Rn constantsRichard Henderson2013-09-251-48/+48
| | | | | | | | Instead of bare N, for clarity. The only (intentional) exception made is for insns that encode R|0, i.e. when R0 encoded into the insn is interpreted as zero not the contents of the register. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: More use of TAI and SAI helper macrosRichard Henderson2013-09-251-25/+16
| | | | | | Finish conversion of all memory operations. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Reformat tcg-target.cRichard Henderson2013-09-251-239/+239
| | | | | | Whitespace and brace changes only. Signed-off-by: Richard Henderson <rth@twiddle.net>
* exec: Split softmmu_defs.hRichard Henderson2013-09-021-3/+0
| | | | | | | | | | | The _cmmu helpers can be moved to exec-all.h. The helpers that are used from TCG will shortly need access to tcg_target_long so move their declarations into tcg.h. This requires minor include adjustments to all TCG backends. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Change tcg_out_ld/st offset to intptr_tRichard Henderson2013-09-021-4/+4
| | | | | Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Change relocation offsets to intptr_tRichard Henderson2013-09-021-1/+1
| | | | | Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Implement muluh, mulshRichard Henderson2013-09-021-25/+7
| | | | | | | | Using these instead of mulu2 and muls2 lets us avoid having to argument overlap analysis in the backend. Normal register allocation will DTRT. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Don't implement remRichard Henderson2013-07-091-26/+0
| | | | | Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: rotr_i32 rotates wrong amountAnton Blanchard2013-06-171-1/+1
| | | | | | | | | rotr_i32 calculates the amount to left shift and puts it into a temporary, but then doesn't use it when doing the shift. Cc: qemu-stable@nongnu.org Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-ppc64: Fix add2_i64Anton Blanchard2013-06-171-7/+7
| | | | | | | | | | add2_i64 was adding the lower double word to the upper double word of each input. Fix this so we add the lower double words, then the upper double words with carry propagation. Cc: qemu-stable@nongnu.org Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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