| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs. | Richard Henderson | 2010-03-26 | 1 | -3/+3 |
| * | tcg: Allow target-specific implementation of NOR. | Richard Henderson | 2010-03-26 | 1 | -0/+1 |
| * | tcg: Allow target-specific implementation of NAND. | Richard Henderson | 2010-03-26 | 1 | -0/+1 |
| * | tcg: Allow target-specific implementation of EQV. | Richard Henderson | 2010-03-26 | 1 | -0/+1 |
| * | tcg: Use TCGCond where appropriate. | Richard Henderson | 2010-03-26 | 1 | -4/+4 |
| * | tcg: Name the opcode enumeration. | Richard Henderson | 2010-03-26 | 1 | -1/+1 |
| * | remove remaining occurrences AREG[1-9] and TCG_AREG[1-9] | Paolo Bonzini | 2010-03-26 | 1 | -2/+0 |
| * | tcg: Add comments for all optional instructions not implemented. | Richard Henderson | 2010-02-20 | 1 | -1/+3 |
| * | tcg/mips: fix crash in tcg_out_qemu_ld() | Aurelien Jarno | 2010-02-09 | 1 | -2/+2 |
| * | tcg/mips: implement setcond2 | Aurelien Jarno | 2010-02-09 | 1 | -12/+80 |
| * | tcg/mips: implement setcond | Aurelien Jarno | 2010-02-08 | 1 | -0/+65 |
| * | tcg: initial mips support | Aurelien Jarno | 2009-12-01 | 2 | -0/+1446 |
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| HQEMU | Raptor Engineering, LLC |
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