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path: root/tcg/mips/tcg-target.h
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* tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITSPaolo Bonzini2015-06-031-0/+1
* tcg: Remove TCG_TARGET_HAS_new_ldstRichard Henderson2014-06-041-2/+0
* tcg-mips: Use EXT for AND on mips32r2Richard Henderson2014-05-241-4/+0
* tcg-mips: Rearrange register allocationRichard Henderson2014-05-241-4/+4
* tcg-mips: Convert to new_ldstRichard Henderson2014-05-241-1/+1
* tcg-mips: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2014-05-121-0/+1
* tcg: Use HOST_WORDS_BIGENDIANRichard Henderson2014-04-181-4/+0
* tcg: Relax requirement for mulu2_i32 on 32-bit hostsRichard Henderson2014-04-181-0/+1
* tcg: Add qemu_ld_st_i32/64Richard Henderson2013-10-101-0/+2
* Merge branch 'tcg-next' of git://github.com/rth7680/qemuAurelien Jarno2013-09-031-2/+3
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| * tcg: Change flush_icache_range arguments to uintptr_tRichard Henderson2013-09-021-2/+1
| * tcg-mips: Implement mulsh, muluhRichard Henderson2013-09-021-2/+2
| * tcg: Add muluh and mulsh opcodesRichard Henderson2013-09-021-0/+2
* | tcg/mips: only enable ext8s/ext16s ops on MIPS32R2Aurelien Jarno2013-09-031-2/+2
* | tcg/mips: detect available host instructions at runtimeAurelien Jarno2013-09-031-21/+29
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* tcg: Split rem requirement from div requirementRichard Henderson2013-07-091-0/+1
* tcg/mips: Implement muls2_i32Aurelien Jarno2013-04-011-1/+1
* tcg: Add signed multiword multiplication operationsRichard Henderson2013-02-231-0/+1
* janitor: add guards to headersPaolo Bonzini2012-12-191-0/+3
* tcg: Remove TCG_TARGET_HAS_GUEST_BASE definePeter Maydell2012-10-121-3/+0
* tcg/mips: fix MIPS32(R2) detectionAurelien Jarno2012-09-261-4/+4
* tcg/mips: implement movcond op on MIPS32R2Aurelien Jarno2012-09-221-0/+8
* tcg/mips: implement deposit op on MIPS32R2Aurelien Jarno2012-09-221-1/+2
* tcg/mips: implement rotl/rotr ops on MIPS32R2Aurelien Jarno2012-09-221-1/+2
* tcg/mips: optimize bswap{16,16s,32} on MIPS32R2Aurelien Jarno2012-09-221-2/+9
* tcg: Introduce movcondRichard Henderson2012-09-211-0/+1
* Remove unused CONFIG_TCG_PASS_AREG0 and dead codeBlue Swirl2012-09-151-1/+0
* w64: Change data type of parameters for flush_icache_rangeStefan Weil2012-03-031-1/+2
* tcg: Standardize on TCGReg as the enum for hard registersRichard Henderson2011-11-141-2/+2
* tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.hStefan Weil2011-10-011-1/+0
* tcg: Always define all of the TCGOpcode enum members.Richard Henderson2011-08-211-15/+16
* Use the correct header in the TCG MIPS code to find cacheflush() on OpenBSD.Brad2011-06-031-0/+4
* tcp/mips: Change TCG_AREG0 (fp -> s0)Stefan Weil2010-04-141-1/+1
* tcg/mips: use seb/seh instructions on MIPS32R2Aurelien Jarno2010-04-051-2/+2
* tcg-mips: add guest base supportAurelien Jarno2010-03-271-0/+3
* tcg-mips: implement norAurelien Jarno2010-03-271-1/+1
* tcg: Allow target-specific implementation of NOR.Richard Henderson2010-03-261-0/+1
* tcg: Allow target-specific implementation of NAND.Richard Henderson2010-03-261-0/+1
* tcg: Allow target-specific implementation of EQV.Richard Henderson2010-03-261-0/+1
* remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]Paolo Bonzini2010-03-261-2/+0
* tcg: Add comments for all optional instructions not implemented.Richard Henderson2010-02-201-1/+3
* tcg: initial mips supportAurelien Jarno2009-12-011-0/+104
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