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* tcg: Change flush_icache_range arguments to uintptr_tRichard Henderson2013-09-021-2/+1
| | | | | Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Add muluh and mulsh opcodesRichard Henderson2013-09-021-0/+4
| | | | | | | | Use them in places where mulu2 and muls2 are used. Optimize mulx2 with dead low part to mulxh. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-i386: Use new return-argument ld/st helpersRichard Henderson2013-08-261-56/+47
| | | | | | | | | Discontinue the jump-around-jump-to-jump scheme, trading it for a single immediate move instruction. The two extra jumps always consume 7 bytes, whereas the immediate move is either 5 or 7 bytes depending on where the code_gen_buffer gets located. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-i386: Tidy qemu_ld/st slow pathRichard Henderson2013-08-261-91/+74
| | | | | | | Use existing stack space for arguments; don't push/pop. Use less ifdefs and more C ifs. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-i386: Try pc-relative lea for constant formationRichard Henderson2013-08-261-5/+20
| | | | | | Use a 7 byte lea before the ultimate 10 byte movq. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-i386: Add and use tcg_out64Richard Henderson2013-08-261-2/+1
| | | | | | | No point in splitting the write into 32-bit pieces. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-i386: Use QEMU_BUILD_BUG_ON instead of assert for frame sizeRichard Henderson2013-07-091-3/+3
| | | | | | | We can check the condition at compile time, rather than run time. Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Move the CIE and FDE header definitions to common codeRichard Henderson2013-07-091-26/+13
| | | | | | | | These will necessarily be the same layout for all hosts. This limits the amount of boilerplate required to implement jit debug for a host. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Remove redundant tcg_target_init checksRichard Henderson2013-06-051-6/+0
| | | | | | | | We've got a compile-time check for the condition in exec/cpu-defs.h. Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: liguang <lig.fnst@cn.fujitsu.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-i386: Implement multiword arithmetic opsRichard Henderson2013-02-232-17/+26
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Add signed multiword multiplication operationsRichard Henderson2013-02-231-0/+2
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Add 64-bit multiword arithmetic operationsRichard Henderson2013-02-231-0/+3
| | | | | | Matching the 32-bit multiword arithmetic that we already have. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg-i386: Always implement 32-bit multiword opsRichard Henderson2013-02-232-12/+13
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Make 32-bit multiword operations optional for 64-bit hostsRichard Henderson2013-02-231-0/+4
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg-i386: use LEA for 3-operand 64-bit additionPaolo Bonzini2013-01-121-1/+1
| | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg-i386: Perform cmov detection at runtime for 32-bit.Richard Henderson2012-12-292-6/+30
| | | | | | | | Existing compile-time detection is spotty at best. Convert it all to runtime detection instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* janitor: add guards to headersPaolo Bonzini2012-12-191-0/+3
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* tcg: Optimize qemu_ld/st by generating slow paths at the end of a blockYeongkyoon Lee2012-11-031-126/+278
| | | | | | | | | Add optimized TCG qemu_ld/st generation which locates the code of TLB miss cases at the end of a block after generating the other IRs. Currently, this optimization supports only i386 and x86_64 hosts. Signed-off-by: Yeongkyoon Lee <yeongkyoon.lee@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg-i386: Use %gs prefixes for x86_64 GUEST_BASERichard Henderson2012-10-281-56/+97
| | | | | | | | | | When we allocate a reserved_va for the guest, the kernel will likely choose an address well above 4G. At which point we must use a pair of movabsq+addq to form the host address. If we have OS support, set up a segment register to point to guest_base instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* tcg/i386: remove ld/st third argument register constraintAurelien Jarno2012-10-281-6/+2
| | | | | | | | | | | | | | | | | On x86_64, remove the constraint on the third argument register which is not needed: - For loads the helper arguments are env, addr, mem_idx. The addr value should not be in the two first argument registers as they are used in tcg_out_tlb_load(). - For stores the helper arguments are env, addr, data, mem_idx. The addr and data values should not be in the two first argument registers as they are used in tcg_out_tlb_load(). The data value should also not be in the two first argument registers, but could be in the third argument register in which case it would be already loaded at the right location. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* tcg/i386: remove suboptimal register shiftingAurelien Jarno2012-10-281-42/+31
| | | | | | | | | | | | | | | Now that CONFIG_TCG_PASS_AREG0 has been removed, it's easier to get an optimal code for the load/store functions. First swap the two registers used in tcg_out_tlb_load() so that the address end-up in the second register instead of the first one. Adjust tcg_out_qemu_ld() and tcg_out_qemu_st() to respectively call tcg_out_qemu_ld_direct() and tcg_out_qemu_st_direct() with the correct registers. Then replace the register shifting by direct load of the arguments. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* tcg: Remove TCG_TARGET_HAS_GUEST_BASE definePeter Maydell2012-10-121-2/+0
| | | | | | | | | | GUEST_BASE support is now supported by all TCG backends, and is now mandatory. Drop the now-pointless TCG_TARGET_HAS_GUEST_BASE define (set by every backend) and the error if it is unset. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* tcg: Add TCG_COND_NEVER, TCG_COND_ALWAYSRichard Henderson2012-10-061-1/+1
| | | | | | | | | | There are several cases that can be handled easier inside both translators and code generators if we have out-of-band values for conditions. It's easy enough to handle ALWAYS and NEVER in the natural way inside the tcg middle-end. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* tcg: remove obsolete jmp opAurelien Jarno2012-10-061-9/+0
| | | | | | | | | | | | | The TCG jmp operation doesn't really make sense in the QEMU context, it is unused, it is not implemented by some targets, and it is wrongly implemented by some others. This patch simply removes it. Reviewed-by: Richard Henderson <rth@twiddle.net> Acked-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Stefan Weil<sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* tcg/i386: fix build with -march < i686Aurelien Jarno2012-09-261-0/+2
| | | | | | | | | | The movcond_i32 op has to be protected with TCG_TARGET_HAS_movcond_i32 to fix the build with -march < i686. Thanks to Richard Henderson for the hint. Reported-by: Alex Barcelo <abarcelo@ac.upc.edu> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* tcg: Remove tcg_target_get_call_iarg_regs_countStefan Weil2012-09-221-6/+0
| | | | | | | | | | | | | The TCG targets no longer need individual implementations. Since commit 6a18ae2d2947532d5c26439548afa0481c4529f9, 'flags' is no longer used in tcg_target_get_call_iarg_regs_count. The remaining tcg_target_get_call_iarg_regs_count is trivial and only called once. Therefore the patch eliminates it completely. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* tcg/i386: Remove unused registers from tcg_target_call_iarg_regsStefan Weil2012-09-221-8/+2
| | | | | | | | | | | 32 bit x86 hosts don't need registers for helper function arguments because they use the default stack based calling convention. Removing the registers allows simpler code for function tcg_target_get_call_iarg_regs_count. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* tcg/i386: Add shortcuts for registers used in L constraintStefan Weil2012-09-221-48/+48
| | | | | | | | | | | | | | | | | | | | While 64 bit hosts use the first three registers which are also used as function input parameters, 32 bit hosts use TCG_REG_EAX and TCG_REG_EDX which are not used in parameter passing. After defining new register macros for the registers used in L constraint, the patch replaces most occurrences of tcg_target_call_iarg_regs[0], tcg_target_call_iarg_regs[1] and tcg_target_call_iarg_regs[2] by those new macros. tcg_target_call_iarg_regs remains unchanged when it is used for input arguments (only with 64 bit hosts) before tcg_out_calli. A comment related to those registers was fixed, too. Signed-off-by: Stefan Weil <sw@weilnetz.de> [aurel32: build fix on i386, small optimization for i386 in the prologue] Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* w64: Fix TCG helper functions with 5 argumentsStefan Weil2012-09-222-1/+5
| | | | | | | | | | | | | | | | | TCG uses 6 registers for function arguments on 64 bit Linux hosts, but only 4 registers on W64 hosts. Commit 2999a0b20074a7e4a58f56572bb1436749368f59 increased the number of arguments for some important helper functions from 4 to 5 which triggered a bug for W64 hosts: QEMU aborts when executing helper_lcall_real in the guest's BIOS because function tcg_target_get_call_iarg_regs_count always returned 6. As W64 has only 4 registers for arguments, the 5th argument must be passed on the stack using a correct stack offset. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* tcg-i386: Implement movcondRichard Henderson2012-09-212-1/+35
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* tcg: Introduce movcondRichard Henderson2012-09-211-0/+2
| | | | | | | | Implemented with setcond if the target does not provide the optional opcode. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* tcg/i386: allow constants in load/store opsAurelien Jarno2012-09-191-13/+37
| | | | | | | | On x86, it is possible to move a constant value to memory. Add code to handle a constant argument to load/store ops. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Remove unused CONFIG_TCG_PASS_AREG0 and dead codeBlue Swirl2012-09-152-31/+0
| | | | | | | | | | | | | Now that CONFIG_TCG_PASS_AREG0 is enabled for all targets, remove dead code and support for !CONFIG_TCG_PASS_AREG0 case. Remove dyngen-exec.h and all references to it. Although included by hw/spapr_hcall.c, it does not seem to use it. Remove unused HELPER_CFLAGS. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
* tcg/i386: Add support for w64 ABIStefan Weil2012-04-151-11/+28
| | | | | | | | | | | | w64 uses the registers rcx, rdx, r8 and r9 for function arguments, so it needs a different declaration of tcg_target_call_iarg_regs. rax, rcx, rdx, r8, r9, r10 and r11 may be changed by function calls. rbx, rbp, rdi, rsi, r12, r13, r14 and r15 remain unchanged by function calls. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Weil <sw@weilnetz.de>
* tcg/i386: Use GDB JIT debugging interface only for hosts with ELFStefan Weil2012-04-151-1/+5
| | | | | | | | | | | Not all i386 / x86_64 hosts use ELF. Ask the compiler whether ELF is used. On w64, gdb crashes when ELF_HOST_MACHINE is defined. Cc: Blue Swirl <blauwirbel@gmail.com> Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Weil <sw@weilnetz.de>
* tcg: Use the GDB JIT debugging interface.Richard Henderson2012-03-241-9/+105
| | | | | | | | This allows us to generate unwind info for the dynamicly generated code in the code_gen_buffer. Only i386 is converted at this point. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* softmmu templates: optionally pass CPUState to memory access functionsBlue Swirl2012-03-181-0/+57
| | | | | | | | | | | Optionally, make memory access helpers take a parameter for CPUState instead of relying on global env. On most targets, perform simple moves to reorder registers. On i386, switch from regparm(3) calling convention to standard stack-based version. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* i386: Remove REGPARMBlue Swirl2012-03-181-56/+56
| | | | | | | Use stack based calling convention (GCC default) for interfacing with generated code instead of register based convention (regparm(3)). Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Rename CPUState -> CPUArchStateAndreas Färber2012-03-141-1/+1
| | | | | | | | | | | | | Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
* tcg: Improve tcg_out_label and fix its usage for w64Stefan Weil2012-03-111-4/+4
| | | | | | | | | | | | | | | | tcg_out_label is always called with a third argument of pointer type which was casted to tcg_target_long. These casts can be avoided by changing the prototype of tcg_out_label. There was also a cast to long. For most hosts with sizeof(long) == sizeof(tcg_target_long) == sizeof(void *) this did not matter, but for w64 it was wrong. This is fixed now. Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* w64: Fix data type of parameters for flush_icache_rangeStefan Weil2012-03-031-1/+2
| | | | | | | | | | | | | | | flush_icache_range takes two address parameters which must be large enough to address any address of the host. For hosts with sizeof(unsigned long) == sizeof(void *), this patch changes nothing. All currently supported hosts fall into this category. For w64 hosts, sizeof(unsigned long) is 4 while sizeof(void *) is 8, so the use of tcg_target_ulong is needed for i386 and tci (the tcg targets which work with w64). Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Remove redundant declarations of TCG_TARGET_REG_BITSStefan Weil2011-12-091-5/+0
| | | | | | | TCG_TARGET_REG_BITS is declared in tcg.h for all TCG targets. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* tcg: Use TCGReg for standard tcg-target entry points.Richard Henderson2011-11-141-6/+7
| | | | | | | | | Including tcg_out_ld, tcg_out_st, tcg_out_mov, tcg_out_movi. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* tcg: Standardize on TCGReg as the enum for hard registersRichard Henderson2011-11-141-2/+2
| | | | | | | | | Most targets did not name the enum; tci used TCGRegister. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* tcg-i386: Introduce limited deposit supportJan Kiszka2011-10-012-2/+31
| | | | | | | | | | | | x86 cannot provide an optimized generic deposit implementation. But at least for a few special cases, namely for writing bits 0..7, 8..15, and 0..15, versions using only a single instruction are feasible. Introducing such limited support improves emulating 16-bit x86 code on x86, but also rarer cases where 32-bit or 64-bit code accesses bytes or words. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg/i386: Only one call output register needed for 64 bit hostsStefan Weil2011-09-171-1/+3
| | | | | | | The second register is only needed for 32 bit hosts. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Always define all of the TCGOpcode enum members.Richard Henderson2011-08-211-33/+35
| | | | | | | | | | | | By always defining these symbols, we can eliminate a lot of ifdefs. To allow this to be checked reliably, the semantics of the TCG_TARGET_HAS_* macros must be changed from def/undef to true/false. This allows even more ifdefs to be removed, converting them into C if statements. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* TCG/x86: use stack for TCG tempsBlue Swirl2011-06-261-10/+12
| | | | | | | Use stack instead of temp_buf array in CPUState for TCG temps. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* TCG/x86: use TCG_REG_CALL_STACK instead of TCG_REG_ESPBlue Swirl2011-06-261-4/+4
| | | | | | | | Except for specific cases where the use of %esp changes the encoding of the instruction, it's cleaner to use TCG_REG_CALL_STACK instead of TCG_REG_ESP. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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