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* softmmu templates: optionally pass CPUState to memory access functionsBlue Swirl2012-03-181-0/+53
* Rename CPUState -> CPUArchStateAndreas Färber2012-03-141-11/+11
* w64: Change data type of parameters for flush_icache_rangeStefan Weil2012-03-031-1/+2
* tcg-arm: fix a typo in commentsAurelien Jarno2012-01-131-1/+1
* tcg/arm: Use r6 as TCG_AREG0 to avoid clash with Thumb framepointerPeter Maydell2012-01-101-1/+1
* tcg/arm: remove fixed map code buffer restrictionDr. David Alan Gilbert2011-12-141-19/+12
* tcg: Use TCGReg for standard tcg-target entry points.Richard Henderson2011-11-141-6/+7
* tcg: Standardize on TCGReg as the enum for hard registersRichard Henderson2011-11-141-2/+2
* tcg/arm: Remove unused tcg_out_addi()Peter Maydell2011-10-011-15/+0
* tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.hStefan Weil2011-10-011-1/+0
* tcg: Always define all of the TCGOpcode enum members.Richard Henderson2011-08-211-14/+16
* Delegate setup of TCG temporaries to targetsBlue Swirl2011-06-261-0/+2
* cpu-exec.c: avoid AREG0 useBlue Swirl2011-06-261-7/+10
* tcg/arm: Support host code being compiled for ThumbPeter Maydell2011-03-241-9/+26
* tcg arm/mips/ia64: add a comment about retranslation and cachesAurelien Jarno2011-01-121-0/+3
* tcg/arm: improve constant loadingAurelien Jarno2011-01-101-18/+21
* tcg/arm: fix qemu_st64 for big endian targetsAurelien Jarno2011-01-081-1/+1
* tcg/arm: fix branch target change during code retranslationAurelien Jarno2011-01-081-8/+20
* tcg: Make some tcg-target.c routines static.Richard Henderson2010-06-091-2/+2
* tcg: Add TYPE parameter to tcg_out_mov.Richard Henderson2010-06-091-1/+1
* tcg/arm: fix condition in zero/sign extension functionsAurelien Jarno2010-04-251-6/+6
* tcg/arm: don't try to load constants using pcAurelien Jarno2010-04-191-7/+0
* tcg/arm: optimize register allocation orderAurelien Jarno2010-04-191-5/+5
* tcg/arm: fix argument alignment in qemu_st64Aurelien Jarno2010-04-191-9/+10
* tcg/arm: remove useless register tests in qemu_ld/stAurelien Jarno2010-04-191-20/+10
* tcg/arm: bswap arguments in qemu_ld/st if neededAurelien Jarno2010-04-191-69/+159
* tcg/arm: use ext* ops in qemu_ldAurelien Jarno2010-04-191-18/+12
* tcg/arm: remove conditional argument for qemu_ld/stAurelien Jarno2010-04-191-51/+49
* tcg/arm: add bswap opsAurelien Jarno2010-04-192-2/+44
* tcg/arm: add ext16u opAurelien Jarno2010-04-192-20/+50
* tcg/arm: add rotation opsAurelien Jarno2010-04-192-1/+20
* tcg/arm: use the blx instruction when possibleAurelien Jarno2010-04-191-4/+12
* tcg/arm: sxtb and sxth are available starting with ARMv6Aurelien Jarno2010-04-191-2/+2
* tcg/arm: add variables to define the allowed instructions setAurelien Jarno2010-04-191-39/+84
* tcg/arm: align 64-bit arguments in function callsAurelien Jarno2010-04-191-0/+1
* tcg/arm: replace integer values by registers enumAurelien Jarno2010-04-191-109/+124
* tcg/arm: remove store signed functionsAurelien Jarno2010-04-191-62/+10
* tcg/arm: explicitely list clobbered/reserved regsAurelien Jarno2010-04-192-5/+11
* tcg/arm: remove SAVE_LR codeAurelien Jarno2010-04-191-43/+0
* tcg/arm: Replace qemu_ld32u (left over from previous commit)Stefan Weil2010-03-281-1/+1
* tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.Richard Henderson2010-03-261-2/+2
* tcg: Allow target-specific implementation of NOR.Richard Henderson2010-03-261-0/+1
* tcg: Allow target-specific implementation of NAND.Richard Henderson2010-03-261-0/+1
* tcg: Allow target-specific implementation of EQV.Richard Henderson2010-03-261-0/+1
* tcg: Name the opcode enumeration.Richard Henderson2010-03-261-1/+1
* remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]Paolo Bonzini2010-03-261-2/+0
* tcg/arm: don't save/restore r7 in prologue/epilogueAurelien Jarno2010-03-201-6/+6
* tcg/arm: fix load/store definitions for 32-bit targetsAurelien Jarno2010-03-201-0/+14
* tcg/arm: use helpers for divu/remuAurelien Jarno2010-03-142-95/+0
* tcg: add div/rem 32-bit helpersAurelien Jarno2010-03-141-0/+1
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