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path: root/tcg/arm/tcg-target.c
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* softmmu templates: optionally pass CPUState to memory access functionsBlue Swirl2012-03-181-0/+53
* Rename CPUState -> CPUArchStateAndreas Färber2012-03-141-11/+11
* tcg-arm: fix a typo in commentsAurelien Jarno2012-01-131-1/+1
* tcg/arm: remove fixed map code buffer restrictionDr. David Alan Gilbert2011-12-141-19/+12
* tcg: Use TCGReg for standard tcg-target entry points.Richard Henderson2011-11-141-6/+7
* tcg/arm: Remove unused tcg_out_addi()Peter Maydell2011-10-011-15/+0
* Delegate setup of TCG temporaries to targetsBlue Swirl2011-06-261-0/+2
* cpu-exec.c: avoid AREG0 useBlue Swirl2011-06-261-7/+10
* tcg/arm: Support host code being compiled for ThumbPeter Maydell2011-03-241-9/+26
* tcg arm/mips/ia64: add a comment about retranslation and cachesAurelien Jarno2011-01-121-0/+3
* tcg/arm: improve constant loadingAurelien Jarno2011-01-101-18/+21
* tcg/arm: fix qemu_st64 for big endian targetsAurelien Jarno2011-01-081-1/+1
* tcg/arm: fix branch target change during code retranslationAurelien Jarno2011-01-081-8/+20
* tcg: Make some tcg-target.c routines static.Richard Henderson2010-06-091-2/+2
* tcg: Add TYPE parameter to tcg_out_mov.Richard Henderson2010-06-091-1/+1
* tcg/arm: fix condition in zero/sign extension functionsAurelien Jarno2010-04-251-6/+6
* tcg/arm: don't try to load constants using pcAurelien Jarno2010-04-191-7/+0
* tcg/arm: optimize register allocation orderAurelien Jarno2010-04-191-5/+5
* tcg/arm: fix argument alignment in qemu_st64Aurelien Jarno2010-04-191-9/+10
* tcg/arm: remove useless register tests in qemu_ld/stAurelien Jarno2010-04-191-20/+10
* tcg/arm: bswap arguments in qemu_ld/st if neededAurelien Jarno2010-04-191-69/+159
* tcg/arm: use ext* ops in qemu_ldAurelien Jarno2010-04-191-18/+12
* tcg/arm: remove conditional argument for qemu_ld/stAurelien Jarno2010-04-191-51/+49
* tcg/arm: add bswap opsAurelien Jarno2010-04-191-0/+42
* tcg/arm: add ext16u opAurelien Jarno2010-04-191-18/+48
* tcg/arm: add rotation opsAurelien Jarno2010-04-191-0/+19
* tcg/arm: use the blx instruction when possibleAurelien Jarno2010-04-191-4/+12
* tcg/arm: sxtb and sxth are available starting with ARMv6Aurelien Jarno2010-04-191-2/+2
* tcg/arm: add variables to define the allowed instructions setAurelien Jarno2010-04-191-39/+84
* tcg/arm: replace integer values by registers enumAurelien Jarno2010-04-191-109/+124
* tcg/arm: remove store signed functionsAurelien Jarno2010-04-191-62/+10
* tcg/arm: explicitely list clobbered/reserved regsAurelien Jarno2010-04-191-4/+9
* tcg/arm: remove SAVE_LR codeAurelien Jarno2010-04-191-43/+0
* tcg/arm: Replace qemu_ld32u (left over from previous commit)Stefan Weil2010-03-281-1/+1
* tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.Richard Henderson2010-03-261-2/+2
* tcg: Name the opcode enumeration.Richard Henderson2010-03-261-1/+1
* tcg/arm: don't save/restore r7 in prologue/epilogueAurelien Jarno2010-03-201-6/+6
* tcg/arm: fix load/store definitions for 32-bit targetsAurelien Jarno2010-03-201-0/+14
* tcg/arm: use helpers for divu/remuAurelien Jarno2010-03-141-94/+0
* tcg/arm: implement andc opAurelien Jarno2010-03-131-0/+4
* tcg/arm: correctly save/restore registers in prologue/epilogueAurelien Jarno2010-03-131-4/+7
* Remove TLB from userspacePaul Brook2010-03-121-0/+2
* tcg/arm: accept immediate arguments for brcond/setcondAurelien Jarno2010-03-021-6/+20
* Add a missing breakAndrzej Zaborowski2010-03-021-0/+1
* tcg/arm: implement setcond2Aurelien Jarno2010-03-021-0/+11
* tcg/arm: implement setcondAurelien Jarno2010-03-021-0/+9
* tcg/arm: fix div2/divu2Aurelien Jarno2010-03-021-6/+24
* ARM back-end: Use sxt[bh] instructions for ext{8, 6}sLaurent Desnogues2009-09-261-0/+10
* Suppress some variants of English in commentsStefan Weil2009-09-251-2/+2
* ARM back-end: Fix encode_immLaurent Desnogues2009-08-251-0/+2
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