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* target-xtensa: fix missing errno codes for mingw32Max Filippov2012-09-081-0/+6
* target-xtensa: convert host errno values to guestMax Filippov2012-09-051-8/+98
* target-xtensa: return ENOSYS for unimplemented simcallsMax Filippov2012-09-011-0/+2
* Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemuBlue Swirl2012-08-091-7/+1
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| * target-xtensa: drop usage of prev_debug_excp_handlerIgor Mammedov2012-06-251-7/+1
* | target-xtensa: make default CPU depend on target endiannessMax Filippov2012-08-091-0/+6
* | target-xtensa: fix big-endian BBS/BBC implementationMax Filippov2012-07-281-2/+14
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* target-xtensa: switch to AREG0-free modeMax Filippov2012-06-104-154/+151
* target-xtensa: add attributes to helper functionsMax Filippov2012-06-101-8/+8
* target-xtensa: remove unnecessary include of dyngen-exec.hPeter Portante2012-06-101-1/+0
* target-xtensa: fix CCOUNT for conditional branchesMax Filippov2012-06-091-0/+2
* target-xtensa: control page table lookup explicitlyMax Filippov2012-06-091-5/+5
* target-xtensa: update autorefill TLB entries conditionallyMax Filippov2012-06-093-27/+35
* target-xtensa: extract TLB entry setting methodMax Filippov2012-06-092-4/+14
* target-xtensa: update EXCVADDR in case of page table lookupMax Filippov2012-06-091-0/+1
* target-xtensa: flush TLB page for new MMU mappingMax Filippov2012-06-091-0/+1
* build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini2012-06-071-1/+2
* build: move libobj-y variable to nested Makefile.objsPaolo Bonzini2012-06-071-0/+3
* build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini2012-06-072-0/+228
* Kill off cpu_state_reset()Andreas Färber2012-06-041-5/+0
* target-xtensa: Let cpu_xtensa_init() return XtensaCPUAndreas Färber2012-06-043-6/+16
* target-xtensa: fix LOOPNEZ/LOOPGTZ translationMax Filippov2012-04-211-1/+1
* target-xtensa: add license to core-fsf.cMax Filippov2012-04-151-0/+27
* target-xtensa: add license to core-dc232b.cMax Filippov2012-04-151-0/+27
* target-xtensa: add dc233c coreMax Filippov2012-04-153-0/+674
* target-xtensa: fix tb invalidation for IBREAK and LOOPMax Filippov2012-04-142-11/+20
* Use uintptr_t for various op related functionsBlue Swirl2012-04-141-5/+4
* target-xtensa: Start QOM'ifying CPU initAndreas Färber2012-04-142-1/+9
* target-xtensa: QOM'ify CPU resetAndreas Färber2012-04-143-14/+14
* target-xtensa: QOM'ify CPUAndreas Färber2012-04-144-1/+153
* target-xtensa: Move helpers.h to helper.hLluís Vilanova2012-04-143-4/+4
* Rename CPUState -> CPUArchStateAndreas Färber2012-03-141-1/+1
* target-xtensa: Don't overuse CPUStateAndreas Färber2012-03-144-68/+68
* Rename cpu_reset() to cpu_state_reset()Andreas Färber2012-03-141-1/+1
* Merge branch 'upstream' of git://qemu.weilnetz.de/qemuBlue Swirl2012-03-033-3/+0
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| * target-xtensa: Clean includesStefan Weil2012-02-283-3/+0
* | target-xtensa: add DEBUG_SECTION to overlay toolMax Filippov2012-02-203-0/+7
* | target-xtensa: add DBREAK data breakpointsMax Filippov2012-02-205-0/+147
* | target-xtensa: add ICOUNT SR and debug exceptionMax Filippov2012-02-182-1/+54
* | target-xtensa: implement instruction breakpointsMax Filippov2012-02-185-3/+119
* | target-xtensa: add DEBUGCAUSE SR and configurationMax Filippov2012-02-182-0/+21
* | target-xtensa: fetch 3rd opcode byte only when neededMax Filippov2012-02-181-1/+2
* | target-xtensa: implement info tlb monitor commandMax Filippov2012-02-182-0/+68
* | target-xtensa: define TLB_TEMPLATE for MMU-less coresMax Filippov2012-02-181-2/+16
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* target-xtensa: fix MMUv3 initializationMax Filippov2011-11-262-2/+2
* target-xtensa: raise an exception for invalid and reserved opcodesMax Filippov2011-11-021-1/+6
* target-xtensa: handle cache options in the overlay toolMax Filippov2011-11-021-0/+6
* target-xtensa: mask out undefined bits of WINDOWSTART SRMax Filippov2011-11-021-1/+1
* target-xtensa: add fsf coreMax Filippov2011-10-162-0/+383
* target-xtensa: add dc232b coreMax Filippov2011-10-163-0/+712
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