index
:
hqemu
2.5.1_overlay
2.5_overlay
2.6_overlay
master
HQEMU
Raptor Engineering, LLC
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
target-xtensa
Commit message (
Expand
)
Author
Age
Files
Lines
...
*
target-xtensa: implement interrupt option
Max Filippov
2011-09-10
5
-12
/
+335
*
target-xtensa: implement SIMCALL
Max Filippov
2011-09-10
2
-1
/
+9
*
target-xtensa: implement unaligned exception option
Max Filippov
2011-09-10
3
-4
/
+73
*
target-xtensa: implement extended L32R
Max Filippov
2011-09-10
3
-4
/
+40
*
target-xtensa: implement loop option
Max Filippov
2011-09-10
4
-9
/
+93
*
target-xtensa: implement windowed registers
Max Filippov
2011-09-10
5
-9
/
+345
*
target-xtensa: implement RST2 group (32 bit mul/div/rem)
Max Filippov
2011-09-10
1
-1
/
+76
*
target-xtensa: implement exceptions
Max Filippov
2011-09-10
5
-6
/
+236
*
target-xtensa: add PS register and access control
Max Filippov
2011-09-10
3
-6
/
+77
*
target-xtensa: implement CACHE group
Max Filippov
2011-09-10
1
-1
/
+94
*
target-xtensa: implement SYNC group
Max Filippov
2011-09-10
1
-1
/
+30
*
target-xtensa: mark reserved and TBD opcodes
Max Filippov
2011-09-10
1
-1
/
+109
*
target-xtensa: implement LSAI group
Max Filippov
2011-09-10
2
-0
/
+90
*
target-xtensa: implement shifts (ST1 and RST1 groups)
Max Filippov
2011-09-10
4
-0
/
+262
*
target-xtensa: implement RST3 group
Max Filippov
2011-09-10
1
-0
/
+161
*
target-xtensa: add special and user registers
Max Filippov
2011-09-10
2
-2
/
+54
*
target-xtensa: implement JX/RET0/CALLX
Max Filippov
2011-09-10
1
-0
/
+43
*
target-xtensa: implement conditional jumps
Max Filippov
2011-09-10
1
-0
/
+164
*
target-xtensa: implement RT0 group
Max Filippov
2011-09-10
1
-0
/
+19
*
target-xtensa: implement narrow instructions
Max Filippov
2011-09-10
1
-0
/
+54
*
target-xtensa: implement disas_xtensa_insn
Max Filippov
2011-09-10
5
-2
/
+556
*
target-xtensa: add target stubs
Max Filippov
2011-09-10
5
-0
/
+326
[prev]
