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path: root/target-xtensa/translate.c
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* target-xtensa: Move helpers.h to helper.hLluís Vilanova2012-04-141-3/+3
* target-xtensa: Don't overuse CPUStateAndreas Färber2012-03-141-11/+11
* target-xtensa: add DBREAK data breakpointsMax Filippov2012-02-201-0/+30
* target-xtensa: add ICOUNT SR and debug exceptionMax Filippov2012-02-181-1/+48
* target-xtensa: implement instruction breakpointsMax Filippov2012-02-181-3/+65
* target-xtensa: add DEBUGCAUSE SR and configurationMax Filippov2012-02-181-0/+6
* target-xtensa: fetch 3rd opcode byte only when neededMax Filippov2012-02-181-1/+2
* target-xtensa: raise an exception for invalid and reserved opcodesMax Filippov2011-11-021-1/+6
* target-xtensa: mask out undefined bits of WINDOWSTART SRMax Filippov2011-11-021-1/+1
* target-xtensa: increase xtensa options accuracyMax Filippov2011-10-161-7/+7
* target-xtensa: implement MAC16 optionMax Filippov2011-10-151-1/+134
* target-xtensa: implement boolean optionMax Filippov2011-09-101-24/+85
* target-xtensa: implement memory protection optionsMax Filippov2011-09-101-5/+86
* target-xtensa: implement relocatable vectorsMax Filippov2011-09-101-0/+1
* target-xtensa: implement CPENABLE and PRID SRsMax Filippov2011-09-101-0/+7
* target-xtensa: implement accurate window checkMax Filippov2011-09-101-0/+110
* target-xtensa: implement interrupt optionMax Filippov2011-09-101-10/+143
* target-xtensa: implement SIMCALLMax Filippov2011-09-101-1/+8
* target-xtensa: implement unaligned exception optionMax Filippov2011-09-101-3/+44
* target-xtensa: implement extended L32RMax Filippov2011-09-101-4/+33
* target-xtensa: implement loop optionMax Filippov2011-09-101-9/+68
* target-xtensa: implement windowed registersMax Filippov2011-09-101-9/+136
* target-xtensa: implement RST2 group (32 bit mul/div/rem)Max Filippov2011-09-101-1/+76
* target-xtensa: implement exceptionsMax Filippov2011-09-101-5/+102
* target-xtensa: add PS register and access controlMax Filippov2011-09-101-5/+24
* target-xtensa: implement CACHE groupMax Filippov2011-09-101-1/+94
* target-xtensa: implement SYNC groupMax Filippov2011-09-101-1/+30
* target-xtensa: mark reserved and TBD opcodesMax Filippov2011-09-101-1/+109
* target-xtensa: implement LSAI groupMax Filippov2011-09-101-0/+89
* target-xtensa: implement shifts (ST1 and RST1 groups)Max Filippov2011-09-101-0/+242
* target-xtensa: implement RST3 groupMax Filippov2011-09-101-0/+161
* target-xtensa: add special and user registersMax Filippov2011-09-101-2/+47
* target-xtensa: implement JX/RET0/CALLXMax Filippov2011-09-101-0/+43
* target-xtensa: implement conditional jumpsMax Filippov2011-09-101-0/+164
* target-xtensa: implement RT0 groupMax Filippov2011-09-101-0/+19
* target-xtensa: implement narrow instructionsMax Filippov2011-09-101-0/+54
* target-xtensa: implement disas_xtensa_insnMax Filippov2011-09-101-0/+452
* target-xtensa: add target stubsMax Filippov2011-09-101-0/+68
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