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path: root/target-xtensa/translate.c
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* target-*: Advance pc after recognizing a breakpointRichard Henderson2015-10-281-0/+5
* target-xtensa: implement S32NBMax Filippov2015-10-211-0/+11
* target-xtensa: implement depbits instructionMax Filippov2015-10-211-0/+20
* target-xtensa: add window overflow check to L32E/S32EMax Filippov2015-10-211-2/+4
* tcg: Remove gen_intermediate_code_pcRichard Henderson2015-10-071-35/+4
* tcg: Pass data argument to restore_state_to_opcRichard Henderson2015-10-071-2/+3
* tcg: Add TCG_MAX_INSNSRichard Henderson2015-10-071-0/+3
* target-*: Introduce and use cpu_breakpoint_testRichard Henderson2015-10-071-18/+7
* target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson2015-10-071-2/+2
* target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson2015-10-071-4/+1
* tcg: Rename debug_insn_start to insn_startRichard Henderson2015-10-071-1/+1
* tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson2015-08-241-1/+1
* target-xtensa: add 64-bit floating point registersMax Filippov2015-07-061-3/+4
* disas: Remove uses of CPU envPeter Crosthwaite2015-06-221-1/+1
* semihosting: create SemihostingConfig structure and semihost.hLeon Alrae2015-06-191-1/+2
* tcg: Change translator-side labels to a pointerRichard Henderson2015-03-131-9/+9
* tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson2015-02-121-4/+3
* tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson2015-02-121-1/+0
* gen-icount: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-1/+1
* target-xtensa: don't generate dead codeMax Filippov2014-12-171-279/+321
* target-xtensa: record available window in TB flagsMax Filippov2014-12-171-43/+18
* target-xtensa: fix translation for opcodes crossing page boundaryMax Filippov2014-12-171-4/+23
* trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova2014-08-121-0/+3
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-051-0/+1
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-3/+2
* target-xtensa: fix cross-page jumps/calls at the end of TBMax Filippov2014-05-261-2/+2
* cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-2/+3
* target-xtensa: provide HW confg ID registersMax Filippov2014-02-241-2/+7
* target-xtensa: add basic checks to icache opcodesMax Filippov2014-02-241-0/+27
* target-xtensa: add basic checks to dcache opcodesMax Filippov2014-02-241-0/+38
* target-xtensa: add RRRI4 opcode format fieldsMax Filippov2014-02-241-0/+9
* target-xtensa: add in_asm loggingMax Filippov2013-10-151-0/+8
* tcg: Move helper registration into tcg_context_initRichard Henderson2013-10-101-2/+0
* tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson2013-09-021-1/+1
* target-xtensa: check register window inlineMax Filippov2013-07-291-8/+25
* target-xtensa: don't generate dead code to access invalid SRsMax Filippov2013-07-291-13/+18
* target-xtensa: avoid double-stopping at breakpointsMax Filippov2013-07-291-2/+1
* cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber2013-07-231-3/+4
* target-xtensa: Change gen_intermediate_code_internal() arg to XtensaCPUAndreas Färber2013-07-091-4/+5
* target-xtensa: gen_intermediate_code_internal() should be inlinedAndreas Färber2013-07-091-2/+3
* cpu: Turn cpu_dump_{state,statistics}() into CPUState hooksAndreas Färber2013-06-281-2/+4
* gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell2013-03-031-2/+2
* target-xtensa: Use add2/sub2 for macRichard Henderson2013-02-231-16/+13
* target-xtensa: Use mul*2 for mul*hiRichard Henderson2013-02-231-14/+6
* target-xtensa: fix search_pc for the last TB opcodeMax Filippov2012-12-221-1/+5
* softmmu: move include files to include/sysemu/Paolo Bonzini2012-12-191-1/+1
* misc: move include files to include/qemu/Paolo Bonzini2012-12-191-1/+1
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-2/+2
* build: kill libdis, move disassemblers to disas/Paolo Bonzini2012-12-191-1/+1
* target-xtensa: use movcond where possibleMax Filippov2012-12-081-50/+42
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