hqemu - HQEMU

	Commit message (Collapse)	Author	Age	Files	Lines
*	target-xtensa: add DEBUG_SECTION to overlay tool	Max Filippov	2012-02-20	1	-0/+5
\| \| \| \| \| \| \|	Fill debug configuration from overlay definitions in the DEBUG_SECTION. Add DEBUG_SECTION to DC232B and FSF cores. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
*	target-xtensa: define TLB_TEMPLATE for MMU-less cores	Max Filippov	2012-02-18	1	-2/+16
\| \| \| \| \| \| \| \|	TLB_TEMPLATE macro specifies TLB geometry in the core configuration. Make TLB_TEMPLATE available for region protection core variants, defining 1 way ITLB and DTLB with 8 entries each. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
*	target-xtensa: fix MMUv3 initialization	Max Filippov	2011-11-26	1	-1/+1
\| \| \| \| \| \| \| \|	- ITLB/DTLB ways 5 and 6 have 4 and 8 entries respectively; - ITLB/DTLB way 6 attr field is set to 3 on reset. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
*	target-xtensa: handle cache options in the overlay tool	Max Filippov	2011-11-02	1	-0/+6
\| \| \| \| \| \| \|	Cache options must be enabled for the cores that have cache to avoid illegal instruction exceptions. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
*	target-xtensa: extract core configuration from overlay	Max Filippov	2011-10-16	1	-0/+534
	Introduce overlay_tool.h that defines core configuration blocks from data available in the linux architecture variant overlay. Overlay data is automatically generated in the core configuration process by Tensilica tools and can be directly converted to qemu xtensa core description by overlay_tool.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>