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path: root/target-xtensa/overlay_tool.h
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* target-xtensa: fix build for cores w/o windowed registersMax Filippov2014-11-031-12/+19
* target-xtensa: add definition for XTHAL_INTTYPE_PROFILINGMax Filippov2014-11-031-0/+1
* target-xtensa: provide HW confg ID registersMax Filippov2014-02-241-1/+8
* target-xtensa: refactor standard core configurationMax Filippov2014-02-241-0/+10
* target-xtensa: implement MISC SRMax Filippov2012-12-081-0/+1
* target-xtensa: restrict available SRs by enabled optionsMax Filippov2012-12-081-1/+3
* target-xtensa: implement CACHEATTR SRMax Filippov2012-12-081-0/+1
* target-xtensa: implement ATOMCTL SRMax Filippov2012-12-081-0/+6
* target-xtensa: handle boolean option in overlaysMax Filippov2012-09-221-0/+1
* target-xtensa: add DEBUG_SECTION to overlay toolMax Filippov2012-02-201-0/+5
* target-xtensa: define TLB_TEMPLATE for MMU-less coresMax Filippov2012-02-181-2/+16
* target-xtensa: fix MMUv3 initializationMax Filippov2011-11-261-1/+1
* target-xtensa: handle cache options in the overlay toolMax Filippov2011-11-021-0/+6
* target-xtensa: extract core configuration from overlayMax Filippov2011-10-161-0/+534
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