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path: root/target-xtensa/op_helper.c
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* cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber2014-03-131-4/+4
* cputlb: Change tlb_flush() argument to CPUStateAndreas Färber2014-03-131-1/+3
* cputlb: Change tlb_flush_page() argument to CPUStateAndreas Färber2014-03-131-4/+6
* exec: Change cpu_watchpoint_{insert,remove{,_by_ref,_all}} argumentAndreas Färber2014-03-131-3/+6
* translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber2014-03-131-2/+4
* cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber2014-03-131-2/+2
* exec: Change tlb_fill() argument to CPUStateAndreas Färber2014-03-131-2/+4
* cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-1/+3
* target-xtensa: add basic checks to icache opcodesMax Filippov2014-02-241-0/+5
* exec: Make tb_invalidate_phys_addr input an ASEdgar E. Iglesias2014-02-111-1/+2
* target: Include softmmu_exec.h where forgottenRichard Henderson2013-09-021-0/+1
* aio / timers: Switch entire codebase to the new timer APIAlex Bligh2013-08-221-1/+1
* target-xtensa: avoid double-stopping at breakpointsMax Filippov2013-07-291-0/+3
* target-xtensa: add fallthrough markersMax Filippov2013-07-291-0/+2
* cpu: Turn cpu_dump_{state,statistics}() into CPUState hooksAndreas Färber2013-06-281-1/+3
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-121-1/+4
* misc: move include files to include/qemu/Paolo Bonzini2012-12-191-1/+1
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-4/+4
* exec: refactor cpu_restore_stateBlue Swirl2012-12-161-12/+2
* target-xtensa: implement ATOMCTL SRMax Filippov2012-12-081-0/+57
* target-xtensa: implement FP1 groupMax Filippov2012-09-221-0/+47
* target-xtensa: implement FP0 conversionsMax Filippov2012-09-221-0/+37
* target-xtensa: implement FP0 arithmeticMax Filippov2012-09-221-0/+37
* target-xtensa: add FP registersMax Filippov2012-09-221-0/+13
* target-xtensa: switch to AREG0-free modeMax Filippov2012-06-101-95/+90
* target-xtensa: update autorefill TLB entries conditionallyMax Filippov2012-06-091-2/+2
* target-xtensa: extract TLB entry setting methodMax Filippov2012-06-091-4/+11
* target-xtensa: flush TLB page for new MMU mappingMax Filippov2012-06-091-0/+1
* target-xtensa: fix tb invalidation for IBREAK and LOOPMax Filippov2012-04-141-11/+18
* Use uintptr_t for various op related functionsBlue Swirl2012-04-141-5/+4
* target-xtensa: Move helpers.h to helper.hLluís Vilanova2012-04-141-1/+1
* target-xtensa: Don't overuse CPUStateAndreas Färber2012-03-141-15/+15
* target-xtensa: add DBREAK data breakpointsMax Filippov2012-02-201-0/+62
* target-xtensa: implement instruction breakpointsMax Filippov2012-02-181-0/+38
* target-xtensa: fix guest hang on masked CCOMPARE interruptMax Filippov2011-10-151-15/+3
* softmmu_header: pass CPUState to tlb_fillBlue Swirl2011-10-011-2/+3
* target-xtensa: implement memory protection optionsMax Filippov2011-09-101-6/+295
* target-xtensa: implement interrupt optionMax Filippov2011-09-101-0/+46
* target-xtensa: implement unaligned exception optionMax Filippov2011-09-101-0/+26
* target-xtensa: implement loop optionMax Filippov2011-09-101-0/+20
* target-xtensa: implement windowed registersMax Filippov2011-09-101-0/+192
* target-xtensa: implement exceptionsMax Filippov2011-09-101-0/+29
* target-xtensa: implement shifts (ST1 and RST1 groups)Max Filippov2011-09-101-0/+14
* target-xtensa: implement disas_xtensa_insnMax Filippov2011-09-101-0/+7
* target-xtensa: add target stubsMax Filippov2011-09-101-0/+52
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