Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | target-xtensa: add DBREAK data breakpoints | Max Filippov | 2012-02-20 | 1 | -0/+2 |
* | target-xtensa: implement instruction breakpoints | Max Filippov | 2012-02-18 | 1 | -0/+5 |
* | target-xtensa: implement memory protection options | Max Filippov | 2011-09-10 | 1 | -0/+7 |
* | target-xtensa: implement interrupt option | Max Filippov | 2011-09-10 | 1 | -0/+5 |
* | target-xtensa: implement SIMCALL | Max Filippov | 2011-09-10 | 1 | -0/+1 |
* | target-xtensa: implement loop option | Max Filippov | 2011-09-10 | 1 | -0/+2 |
* | target-xtensa: implement windowed registers | Max Filippov | 2011-09-10 | 1 | -0/+8 |
* | target-xtensa: implement exceptions | Max Filippov | 2011-09-10 | 1 | -0/+2 |
* | target-xtensa: implement shifts (ST1 and RST1 groups) | Max Filippov | 2011-09-10 | 1 | -0/+2 |
* | target-xtensa: implement disas_xtensa_insn | Max Filippov | 2011-09-10 | 1 | -0/+5 |