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target-xtensa
/
cpu.h
Commit message (
Expand
)
Author
Age
Files
Lines
*
exec: move include files to include/exec/
Paolo Bonzini
2012-12-19
1
-3
/
+3
*
target-xtensa: implement MISC SR
Max Filippov
2012-12-08
1
-0
/
+1
*
target-xtensa: restrict available SRs by enabled options
Max Filippov
2012-12-08
1
-0
/
+1
*
target-xtensa: implement CACHEATTR SR
Max Filippov
2012-12-08
1
-0
/
+2
*
target-xtensa: implement ATOMCTL SR
Max Filippov
2012-12-08
1
-0
/
+10
*
cpus: Pass CPUState to [qemu_]cpu_has_work()
Andreas Färber
2012-10-31
1
-1
/
+3
*
target-xtensa: implement coprocessor context option
Max Filippov
2012-09-22
1
-0
/
+5
*
target-xtensa: add FP registers
Max Filippov
2012-09-22
1
-0
/
+3
*
target-xtensa: make default CPU depend on target endianness
Max Filippov
2012-08-09
1
-0
/
+6
*
target-xtensa: update autorefill TLB entries conditionally
Max Filippov
2012-06-09
1
-1
/
+1
*
target-xtensa: extract TLB entry setting method
Max Filippov
2012-06-09
1
-0
/
+3
*
target-xtensa: Let cpu_xtensa_init() return XtensaCPU
Andreas Färber
2012-06-04
1
-3
/
+13
*
target-xtensa: QOM'ify CPU reset
Andreas Färber
2012-04-14
1
-0
/
+1
*
target-xtensa: QOM'ify CPU
Andreas Färber
2012-04-14
1
-0
/
+1
*
Rename CPUState -> CPUArchState
Andreas Färber
2012-03-14
1
-1
/
+1
*
target-xtensa: Don't overuse CPUState
Andreas Färber
2012-03-14
1
-22
/
+22
*
target-xtensa: add DBREAK data breakpoints
Max Filippov
2012-02-20
1
-0
/
+12
*
target-xtensa: add ICOUNT SR and debug exception
Max Filippov
2012-02-18
1
-0
/
+6
*
target-xtensa: implement instruction breakpoints
Max Filippov
2012-02-18
1
-0
/
+9
*
target-xtensa: add DEBUGCAUSE SR and configuration
Max Filippov
2012-02-18
1
-0
/
+15
*
target-xtensa: implement info tlb monitor command
Max Filippov
2012-02-18
1
-0
/
+1
*
target-xtensa: extract core configuration from overlay
Max Filippov
2011-10-16
1
-0
/
+6
*
target-xtensa: implement external interrupt mapping
Max Filippov
2011-10-16
1
-0
/
+3
*
target-xtensa: increase xtensa options accuracy
Max Filippov
2011-10-16
1
-1
/
+5
*
target-xtensa: implement MAC16 option
Max Filippov
2011-10-15
1
-0
/
+3
*
target-xtensa: fix guest hang on masked CCOMPARE interrupt
Max Filippov
2011-10-15
1
-0
/
+1
*
target-xtensa: implement boolean option
Max Filippov
2011-09-10
1
-0
/
+1
*
target-xtensa: implement memory protection options
Max Filippov
2011-09-10
1
-1
/
+55
*
target-xtensa: add gdb support
Max Filippov
2011-09-10
1
-0
/
+14
*
target-xtensa: implement relocatable vectors
Max Filippov
2011-09-10
1
-0
/
+2
*
target-xtensa: implement CPENABLE and PRID SRs
Max Filippov
2011-09-10
1
-0
/
+2
*
target-xtensa: implement interrupt option
Max Filippov
2011-09-10
1
-1
/
+44
*
target-xtensa: implement extended L32R
Max Filippov
2011-09-10
1
-0
/
+6
*
target-xtensa: implement loop option
Max Filippov
2011-09-10
1
-0
/
+3
*
target-xtensa: implement windowed registers
Max Filippov
2011-09-10
1
-0
/
+8
*
target-xtensa: implement exceptions
Max Filippov
2011-09-10
1
-0
/
+67
*
target-xtensa: add PS register and access control
Max Filippov
2011-09-10
1
-1
/
+52
*
target-xtensa: implement LSAI group
Max Filippov
2011-09-10
1
-0
/
+1
*
target-xtensa: implement shifts (ST1 and RST1 groups)
Max Filippov
2011-09-10
1
-0
/
+4
*
target-xtensa: add special and user registers
Max Filippov
2011-09-10
1
-0
/
+7
*
target-xtensa: implement disas_xtensa_insn
Max Filippov
2011-09-10
1
-0
/
+67
*
target-xtensa: add target stubs
Max Filippov
2011-09-10
1
-0
/
+95
