hqemu - HQEMU

	Commit message (Expand)	Author	Age	Files	Lines
*	target-tricore: Add instructions of RCR opcode format	Bastian Koppelmann	2014-12-10	4	-1/+657
*	target-tricore: Add instructions of RLC opcode format	Bastian Koppelmann	2014-12-10	5	-0/+252
*	target-tricore: Add instructions of RCPW, RCRR and RCRW opcode format	Bastian Koppelmann	2014-12-10	1	-3/+129
*	target-tricore: Make TRICORE_FEATURES implying others.	Bastian Koppelmann	2014-12-10	2	-3/+12
*	target-tricore: Add instructions of RC opcode format	Bastian Koppelmann	2014-12-10	4	-0/+799
*	target-tricore: Add instructions of BRR opcode format	Bastian Koppelmann	2014-12-10	2	-2/+89
*	target-tricore: Add instructions of BRN opcode format	Bastian Koppelmann	2014-12-10	2	-0/+27
*	target-tricore: Add instructions of BRC opcode format	Bastian Koppelmann	2014-12-10	2	-3/+56
*	target-tricore: Add instructions of BOL opcode format	Bastian Koppelmann	2014-12-10	2	-1/+51
*	target-tricore: Add instructions of BO opcode format	Bastian Koppelmann	2014-10-20	4	-0/+704
*	target-tricore: Add instructions of BIT opcode format	Bastian Koppelmann	2014-10-20	1	-0/+312
*	target-tricore: Add instructions of B opcode format	Bastian Koppelmann	2014-10-20	1	-0/+27
*	target-tricore: Add instructions of ABS, ABSB opcode format	Bastian Koppelmann	2014-10-20	3	-0/+352
*	target-tricore: Cleanup and Bugfixes	Bastian Koppelmann	2014-10-20	2	-27/+22
*	target-tricore: Remove the dummy interrupt boilerplate	Richard Henderson	2014-09-25	4	-8/+0
*	target-tricore: Add instructions of SR opcode format	Bastian Koppelmann	2014-09-01	3	-0/+164
*	target-tricore: Add instructions of SLR, SSRO and SRO opcode format	Bastian Koppelmann	2014-09-01	1	-0/+121
*	target-tricore: Add instructions of SC opcode format	Bastian Koppelmann	2014-09-01	3	-0/+108
*	target-tricore: Add instructions of SBR opcode format	Bastian Koppelmann	2014-09-01	1	-1/+65
*	target-tricore: Add instructions of SBC and SBRN opcode format	Bastian Koppelmann	2014-09-01	1	-0/+36
*	target-tricore: Add instructions of SB opcode format	Bastian Koppelmann	2014-09-01	3	-0/+276
*	target-tricore: Add instructions of SRRS and SLRO opcode format	Bastian Koppelmann	2014-09-01	1	-0/+59
*	target-tricore: Add instructions of SSR opcode format	Bastian Koppelmann	2014-09-01	1	-0/+50
*	target-tricore: Add instructions of SRR opcode format	Bastian Koppelmann	2014-09-01	3	-0/+211
*	target-tricore: Add instructions of SRC opcode format	Bastian Koppelmann	2014-09-01	2	-0/+267
*	target-tricore: Add masks and opcodes for decoding	Bastian Koppelmann	2014-09-01	2	-0/+1407
*	target-tricore: Add initialization for translation and activate target	Bastian Koppelmann	2014-09-01	1	-0/+165
*	target-tricore: Add softmmu support	Bastian Koppelmann	2014-09-01	2	-2/+85
*	target-tricore: Add target stubs and qom-cpu	Bastian Koppelmann	2014-09-01	9	-0/+916