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target-tricore
Commit message (
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Author
Age
Files
Lines
*
target-tricore: Remove the dummy interrupt boilerplate
Richard Henderson
2014-09-25
4
-8
/
+0
*
target-tricore: Add instructions of SR opcode format
Bastian Koppelmann
2014-09-01
3
-0
/
+164
*
target-tricore: Add instructions of SLR, SSRO and SRO opcode format
Bastian Koppelmann
2014-09-01
1
-0
/
+121
*
target-tricore: Add instructions of SC opcode format
Bastian Koppelmann
2014-09-01
3
-0
/
+108
*
target-tricore: Add instructions of SBR opcode format
Bastian Koppelmann
2014-09-01
1
-1
/
+65
*
target-tricore: Add instructions of SBC and SBRN opcode format
Bastian Koppelmann
2014-09-01
1
-0
/
+36
*
target-tricore: Add instructions of SB opcode format
Bastian Koppelmann
2014-09-01
3
-0
/
+276
*
target-tricore: Add instructions of SRRS and SLRO opcode format
Bastian Koppelmann
2014-09-01
1
-0
/
+59
*
target-tricore: Add instructions of SSR opcode format
Bastian Koppelmann
2014-09-01
1
-0
/
+50
*
target-tricore: Add instructions of SRR opcode format
Bastian Koppelmann
2014-09-01
3
-0
/
+211
*
target-tricore: Add instructions of SRC opcode format
Bastian Koppelmann
2014-09-01
2
-0
/
+267
*
target-tricore: Add masks and opcodes for decoding
Bastian Koppelmann
2014-09-01
2
-0
/
+1407
*
target-tricore: Add initialization for translation and activate target
Bastian Koppelmann
2014-09-01
1
-0
/
+165
*
target-tricore: Add softmmu support
Bastian Koppelmann
2014-09-01
2
-2
/
+85
*
target-tricore: Add target stubs and qom-cpu
Bastian Koppelmann
2014-09-01
9
-0
/
+916