summaryrefslogtreecommitdiffstats
path: root/target-sparc
Commit message (Collapse)AuthorAgeFilesLines
* disas: avoid using cpu_single_envBlue Swirl2012-11-101-1/+1
| | | | | | | | | Pass around CPUArchState instead of using global cpu_single_env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Richard Henderson <rth@twiddle.net> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
* Merge branch 'trivial-patches' of git://github.com/stefanha/qemuBlue Swirl2012-11-032-5/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'trivial-patches' of git://github.com/stefanha/qemu: pc: Drop redundant test for ROM memory region exec: make some functions static target-ppc: make some functions static ppc: add missing static vnc: add missing static vl.c: add missing static target-sparc: make do_unaligned_access static m68k: Return semihosting errno values correctly cadence_uart: More debug information Conflicts: target-m68k/m68k-semi.c
| * target-sparc: make do_unaligned_access staticBlue Swirl2012-11-012-5/+6
| | | | | | | | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* | cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber2012-10-311-1/+3
|/ | | | | | | | | | For target-mips also change the return type to bool. Make include paths for cpu-qom.h consistent for alpha and unicore32. Signed-off-by: Andreas Färber <afaerber@suse.de> [AF: Updated new target-openrisc function accordingly] Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
* target-sparc: Revert setting cpu_dst to gen_dest_gprRichard Henderson2012-10-301-1/+1
| | | | | | | | | | | | There is some read-after-write error within the OP=2 insns which prevents setting cpu_dst to the real output register. Until this is found and fixed, always write to a temporary first. Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: rename helper flagsAurelien Jarno2012-10-281-25/+25
| | | | | | | | | Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Acked-by: Blue Swirl <blauwirbel@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Rename target_phys_addr_t to hwaddrAvi Kivity2012-10-233-39/+39
| | | | | | | | | | | | | | | target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* target-sparc: fix FMOVr instructionAurelien Jarno2012-10-201-1/+1
| | | | | | | | | Like the MOVr instruction, the FMOVr instruction has the condition encoded between bits 10 and 12. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove cpu_tmp0 as a globalRichard Henderson2012-10-201-85/+118
| | | | | | | | | | Subroutines do their own local temporary management. Within disas_sparc_insn we limit the existance of the variable to OP=2 insns, and delay initialization as late as is reasonable for the specific XOP. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Make cpu_dst local to OP=2 insnsRichard Henderson2012-10-201-4/+3
| | | | | | | And initialize it such that it (may) write directly to rd. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Only use cpu_dst for eventual writes to a gprRichard Henderson2012-10-201-26/+26
| | | | | | | Use cpu_tmp0 for other stuff, like Write Priv Register. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove last uses of cpu_tmp64Richard Henderson2012-10-201-11/+17
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove cpu_tmp64 use from softint insnsRichard Henderson2012-10-201-6/+6
| | | | | | | | The use of "tl" functions and a tmp64 is logically incompatible. Use cpu_tmp0 instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Don't use a temporary for gen_dest_fpr_DRichard Henderson2012-10-201-16/+16
| | | | | | | In all cases we don't have write-before-read problems. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove usage of cpu_tmp64 from most helper functionsRichard Henderson2012-10-201-29/+44
| | | | | | | Use a locally allocated temporary instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy ldfsr, stfsrRichard Henderson2012-10-201-20/+17
| | | | | | | | Remove the last uses of cpu_tmp32. Unify the code between sparc64 and sparc32 by using the proper "tl" functions. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Avoid cpu_tmp32 in Write Priv RegisterRichard Henderson2012-10-201-32/+24
| | | | | | | No need to copy to a temporary to store 32 bits. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Avoid cpu_tmp32 in Read Priv RegisterRichard Henderson2012-10-201-32/+21
| | | | | | | | We don't need another temporary here. Load directly into the register we want to set. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use get_temp_i32 in gen_dest_fpr_FRichard Henderson2012-10-201-14/+14
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Split out get_temp_i32Richard Henderson2012-10-201-12/+17
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Make the cpu_addr variable local to load/store handlingRichard Henderson2012-10-201-11/+11
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Cleanup cpu_src[12] allocationRichard Henderson2012-10-201-9/+7
| | | | | | | | | | | Now that get_temp_tl is used for get_src[12], we don't need to pre-allocate these temporaries. Fallout from this is moving some assignments around cas/casx to avoid uninitialized variable warnings. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Finish conversion to gen_load_gprRichard Henderson2012-10-201-38/+20
| | | | | | | | All users of gen_movl_{reg_TN,TN_reg} are removed. At the same time, make cpu_val a local variable for load/store disassembly. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Convert swap to gen_load/store_gprRichard Henderson2012-10-201-8/+8
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Convert asi helpers to gen_*_gprRichard Henderson2012-10-201-29/+32
| | | | | | | | Push the DisasContext down so that we can use gen_load/store_gpr in sode gen_ldda_asi, gen_stda_ast, gen_cas_asi, gen_casx_asi. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use gen_load_gpr in get_src[12]Richard Henderson2012-10-201-46/+29
| | | | | | | | This means we can avoid the incoming temporary, though the cleanup of the existing temporaries is not performed in this patch. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Conversion to gen_*_gpr, part 1Richard Henderson2012-10-201-243/+177
| | | | | | | Only handle the easy cases directly within disas_sparc_insn. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Add gen_load/store/dest_gprRichard Henderson2012-10-201-0/+52
| | | | | | | Infrastructure to be used to clean up handling of temporaries. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Don't compute full flags value so oftenRichard Henderson2012-10-133-19/+21
| | | | | | | | | Avoid speculatively computing flags before every potentially trapping operation and instead do the flags computation when a trap actually occurs. This gives approximately 30% speedup in emulation. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Avoid unnecessary local temporariesRichard Henderson2012-10-131-21/+9
| | | | | | | | Now that save_state never ends a BB, we don't need to copy values into local temps around it. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Optimize CC_OP_LOGIC conditionsRichard Henderson2012-10-131-18/+40
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Fix optimized %icc comparisonsRichard Henderson2012-10-131-0/+1
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Optimize conditionals using SUBCCRichard Henderson2012-10-071-61/+131
| | | | | | | | | Aka "normal" comparisons. We now have the infrastructure to pass back non-boolean results from gen_compare. This will automatically get used by both branches and conditional moves. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Fall through from not-taken trapRichard Henderson2012-10-071-5/+7
| | | | | | | | Now that we've cleaned up global temporary allocation, we can continue translating the fallthru path of a conditional trap. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Cleanup "global" temporary allocationRichard Henderson2012-10-071-19/+19
| | | | | | | | | | | | There are 6 temporaries that disas_sparc_insn relies on having been allocated. Now that they are no longer referenced across branches, they need not be allocated as local temps. Move the allocation/free of these temporaries to make it clear that they are local to the translation of a single insn. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use movcond for FMOV*RRichard Henderson2012-10-071-30/+16
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use movcond in mulsccRichard Henderson2012-10-071-6/+5
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Move taddcctv and tsubcctv out of lineRichard Henderson2012-10-073-102/+66
| | | | | | | | | | The branches around the exception are maintaining an otherwise unnecessary use of local temps for the cpu destination. Note that gen_op_t{add,sub}_cc were identical to gen_op_{add,sub}_cc. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy TccRichard Henderson2012-10-071-38/+53
| | | | | | | | | | | | | Share more code between unconditional and conditional paths. Move the computation of the trap number into the conditional BB; avoid using temporaries that have gone out of scope (cpu_tmp32) or rely on local temps (cpu_dst). Fully fold the exception number when the trap number is %g0+imm. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Move sdivx and udivx out of lineRichard Henderson2012-10-075-52/+37
| | | | | | | | The branches around the exception are maintaining an otherwise unnecessary use of local temps for the cpu destination. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use movcond in gen_generic_branchRichard Henderson2012-10-071-11/+7
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use DisasCompare and movcond in MOVRRichard Henderson2012-10-071-17/+14
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use DisasCompare and movcond in MOVCCRichard Henderson2012-10-071-24/+20
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use DisasCompare and movcond in FMOVR, FMOVCCRichard Henderson2012-10-071-117/+86
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use DisasCompare in TccRichard Henderson2012-10-071-9/+11
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Introduce DisasCompare and functions to generate itRichard Henderson2012-10-071-9/+83
| | | | | | | | For the moment gen_cond et al retain their existing interface, using setcond to turn a (potential) comparison back into a boolean. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy gen_generic_branch interfaceRichard Henderson2012-10-071-8/+7
| | | | | | | | The arguments passed are always the same. Pass down just DisasContext instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy save_npc interfaceRichard Henderson2012-10-071-4/+4
| | | | | | | Use the cpu_cond global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy gen_mov_pc_npc interfaceRichard Henderson2012-10-071-6/+6
| | | | | | | Use the cpu_cond global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy save_state interfaceRichard Henderson2012-10-071-49/+49
| | | | | | | Use the cpu_cond global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
OpenPOWER on IntegriCloud