| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | target-sparc: Implement FALIGNDATA inline. | Richard Henderson | 2011-10-26 | 1 | -12/+0 |
| * | target-sparc: Implement BMASK/BSHUFFLE. | Richard Henderson | 2011-10-26 | 1 | -0/+29 |
| * | target-sparc: Implement ALIGNADDR* inline. | Richard Henderson | 2011-10-26 | 1 | -11/+0 |
| * | target-sparc: Implement fpack{16,32,fix}. | Richard Henderson | 2011-10-26 | 1 | -0/+64 |
| * | target-sparc: Implement PDIST. | Richard Henderson | 2011-10-26 | 1 | -0/+21 |
| * | target-sparc: Make FPU/VIS helpers const when possible. | Richard Henderson | 2011-10-26 | 1 | -19/+16 |
| * | target-sparc: Pass float64 parameters instead of dt0/1 temporaries. | Richard Henderson | 2011-10-26 | 1 | -59/+54 |
| * | Sparc: avoid AREG0 for float and VIS ops | Blue Swirl | 2011-10-23 | 1 | -19/+22 |
| * | Sparc: split FPU and VIS op helpers | Blue Swirl | 2011-10-23 | 1 | -0/+403 |
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| HQEMU | Raptor Engineering, LLC |
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