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* target-sparc: Fix -singlestep.Richard Henderson2010-04-261-4/+5
| | | | | | | | | | | | Single-stepping was not properly updating npc, resulting in some instructions being executed twice. In addition, we were emitting dead code at the end of the TB. Fix both by teaching gen_goto_tb to avoid goto_tb for single-step and removing the special-case code in gen_intermediate_code_internal. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Fix harmless if statements with empty body, spotted by clangBlue Swirl2010-04-181-1/+2
| | | | | | | | | | | | | | These clang errors are harmless but worth fixing: CC ppc-softmmu/usb-ohci.o /src/qemu/hw/usb-ohci.c:1104:59: error: if statement has empty body [-Wempty-body] ohci->ctrl_head, ohci->ctrl_cur); /src/qemu/hw/usb-ohci.c:1371:57: error: if statement has empty body [-Wempty-body] DPRINTF("usb-ohci: port %d: SUSPEND\n", portnum); CC sparc64-softmmu/translate.o /src/qemu/target-sparc/translate.c:3173:37: error: if statement has empty body [-Wempty-body] ; // XXX Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Free instruction temporaries.Richard Henderson2010-04-171-25/+27
| | | | | | | | | | | | | | Rather than creating new temporaries for constants, use the ones created in disas_sparc_insn. Remember the temps created there so that they can be freed at the end of the function. Profile data collected by TCG while booting sparc-test kernel: -avg temps/TB 70.61 max=421 +avg temps/TB 62.75 max=66 Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc: fix PC/NPC during FPU trapsBlue Swirl2010-04-171-0/+2
| | | | | | | All FPU instructions can trap, so save PC/NPC state before executing them. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc: fix exceptions in delay slotBlue Swirl2010-04-111-4/+4
| | | | | | | | | | | | | | | | | Fix a case where an exception happens with the instruction in the delay slot. Recovery of branch condition in the exception handling code was not converted to TCG. Because the condition was bogus, wrong NPC could be selected from the two candidates. A nice bug report with a test case can be found in: https://bugs.launchpad.net/qemu/+bug/551814 Fix based on patch by Fabrice Bellard. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* remove TARGET_* defines from translate-all.cPaolo Bonzini2010-04-081-0/+3
| | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-sparc: fix --enable-debug build for 64 bit hostStefan Weil2010-02-251-1/+1
| | | | | | | | | | | b551ec04ca45d1925417dd2ec7c1b7f115c84f1d fixed the compilation for 32 bit hosts, but introduced a new error for 64 bit hosts: tcg_temp_new_ptr needs a matching tcg_temp_free_ptr. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: fix --enable-debug buildJay Foad2010-02-201-11/+11
| | | | | | | | Use 32-bit arithmetic for the address offset calculation to fix a build failure on 32-bit hosts. Signed-off-by: Jay Foad <jay.foad@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* sparc64: use helper_wrpil to check pending irq on writeIgor V. Kovalenko2010-01-081-4/+1
| | | | | Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* sparc64-8bit-asiIgor V. Kovalenko2009-09-231-0/+1
| | | | | | | | | | | | | Sparc64 alternate space load/store helpers expect 8 bit ASI value, while wrasi implementation sign-extends ASI operand causing for example 0x80 to appear as 0xFFFFFF80. Resulting value falls out of switch in helpers and causes obscure load/store faults. - correct wrasi by masking lower 8 bits of xor result - use lower 8 bits of ASI register in helpers Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Fix sys-queue.h conflict for goodBlue Swirl2009-09-121-2/+2
| | | | | | | | | | | | | | | Problem: Our file sys-queue.h is a copy of the BSD file, but there are some additions and it's not entirely compatible. Because of that, there have been conflicts with system headers on BSD systems. Some hacks have been introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896, f40d753718c72693c5f520f0d9899f6e50395e94, 96555a96d724016e13190b28cffa3bc929ac60dc and 3990d09adf4463eca200ad964cc55643c33feb50 but the fixes were fragile. Solution: Avoid the conflict entirely by renaming the functions and the file. Revert the previous hacks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc32/64: fix jmpl followed by branchBlue Swirl2009-08-221-0/+2
| | | | | | | Fix a case where 'jmpl' instruction followed by a branch instruction was handled incorrectly. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Fix desynchronization of condition code state when a memory access trapsBlue Swirl2009-08-151-0/+11
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc64: replace tsptr with helper routineIgor Kovalenko2009-08-041-16/+35
| | | | | | | | | | | | | | | | | | | tl and tsptr of members sparc64 cpu state must be changed simultaneously to keep trap state window in sync with current trap level. Currently translation of store to tl does not change tsptr, which leads to corrupt trap state on corresponding trap level. This patch removes tsptr from sparc64 cpu state and replaces all uses with call to helper routine. Changes v0->v1: - reimplemented helper routine with tcg generator - on cpu reset trap type and pstate are populated with power-on reset values, including tl=maxtl Signed-off-by: igor.v.kovalenko@gmail.com Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* sparc64 flush pending conditional evaluations before exposing cpu stateIgor Kovalenko2009-07-311-0/+5
| | | | | | | | | | | | | If translation block is interrupted by e.g. mmu exception we need to compute conditional flags for inclusion into saved cpu state. Otherwise after return from trap conditional instructions would use stale psr/xcc data. Signed-off-by: igor.v.kovalenko@gmail.com -- Kind regards, Igor V. Kovalenko
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Use correct type for SPARC cpu_cc_opPaul Brook2009-06-061-1/+2
| | | | Signed-off-by: Paul Brook <paul@codesourcery.com>
* Convert mulsccBlue Swirl2009-05-101-131/+2
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Convert udiv/sdivBlue Swirl2009-05-101-19/+6
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Convert tagged opsBlue Swirl2009-05-101-129/+8
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Convert subxBlue Swirl2009-05-101-31/+6
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Convert subBlue Swirl2009-05-101-37/+11
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Convert logical operations and umul/smulBlue Swirl2009-05-101-24/+24
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Convert addxBlue Swirl2009-05-101-31/+6
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Convert addBlue Swirl2009-05-101-21/+6
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Use dynamical computation for condition codesBlue Swirl2009-05-101-24/+108
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Optimize cmp x, 0 caseBlue Swirl2009-05-031-14/+19
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* ReindentBlue Swirl2009-05-031-319/+312
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Improve instruction name comments for easier searchingBlue Swirl2009-05-021-44/+44
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Optimize operations with immediate parametersBlue Swirl2009-05-021-52/+200
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* Fix Sparc64 sign extension problemsBlue Swirl2009-05-021-32/+36
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Add new command line option -singlestep for tcg single stepping.aurel322009-04-051-1/+1
| | | | | | | | | | | | | | This replaces a compile time option for some targets and adds this feature to targets which did not have a compile time option. Add monitor command to enable or disable single step mode. Modify monitor command "info status" to display single step mode. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
* Delete some unused macros detected with -Wp,-Wunused-macros useblueswir12009-03-161-20/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6856 c046a42c-6fe2-441c-8c8c-71466251a162
* global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori2009-01-151-2/+2
| | | | | | | | | | | | These are references to 'loglevel' that aren't on a simple 'if (loglevel & X) qemu_log()' statement. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
* Convert references to logfile/loglevel to use qemu_log*() macrosaliguori2009-01-151-9/+6
| | | | | | | | | | | | This is a large patch that changes all occurrences of logfile/loglevel global variables to use the new qemu_log*() macros. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
| | | | | | | | | | The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
* Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori2008-11-251-2/+2
| | | | | | | | | | | | | This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the code and also fixing a use after release issue in cpu_break/watchpoint_remove_all. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
* Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori2008-11-181-3/+4
| | | | | | | | | | | | | | | | | | | | | This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the succeeding enhancements this series comes with. First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching to dynamically allocated data structures that are kept in linked lists. This also allows to return a stable reference to the related objects, required for later introduced x86 debug register support. Breakpoints and watchpoints are stored with their full information set and an additional flag field that makes them easily extensible for use beyond pure guest debugging. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
* TCG variable type checking.pbrook2008-11-171-523/+521
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
* Use TCG not opblueswir12008-11-091-14/+12
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5663 c046a42c-6fe2-441c-8c8c-71466251a162
* Use andc, orc, nor and nandblueswir12008-11-091-52/+36
| | | | | | | Also fix which argument gets negated in fandnot[12] and fornot[12] git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5662 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix TCGv size mismatchesblueswir12008-11-011-19/+21
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5593 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement UA2005 hypervisor trapsblueswir12008-09-261-2/+23
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5327 c046a42c-6fe2-441c-8c8c-71466251a162
* Add software and timer interrupt supportblueswir12008-09-221-5/+29
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162
* Use the new concat_tl_i64 op for std and stdablueswir12008-09-211-18/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5283 c046a42c-6fe2-441c-8c8c-71466251a162
* Use the new concat_i32_i64 op for std and stdablueswir12008-09-211-16/+20
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5281 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix mulscc with high bits set in either src1 or src2blueswir12008-09-131-2/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5201 c046a42c-6fe2-441c-8c8c-71466251a162
* Write zeros to high bits of y, based on patch by Vince Weaverblueswir12008-09-111-2/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5196 c046a42c-6fe2-441c-8c8c-71466251a162
* Convert rest of ops using float32 to TCG, remove FT0 and FT1blueswir12008-09-101-35/+16
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
* Partially convert float128 conversion ops to TCGblueswir12008-09-101-8/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5192 c046a42c-6fe2-441c-8c8c-71466251a162
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