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* target-sparc: Only use cpu_dst for eventual writes to a gprRichard Henderson2012-10-201-26/+26
| | | | | | | Use cpu_tmp0 for other stuff, like Write Priv Register. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove last uses of cpu_tmp64Richard Henderson2012-10-201-11/+17
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove cpu_tmp64 use from softint insnsRichard Henderson2012-10-201-6/+6
| | | | | | | | The use of "tl" functions and a tmp64 is logically incompatible. Use cpu_tmp0 instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Don't use a temporary for gen_dest_fpr_DRichard Henderson2012-10-201-16/+16
| | | | | | | In all cases we don't have write-before-read problems. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Remove usage of cpu_tmp64 from most helper functionsRichard Henderson2012-10-201-29/+44
| | | | | | | Use a locally allocated temporary instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy ldfsr, stfsrRichard Henderson2012-10-201-20/+17
| | | | | | | | Remove the last uses of cpu_tmp32. Unify the code between sparc64 and sparc32 by using the proper "tl" functions. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Avoid cpu_tmp32 in Write Priv RegisterRichard Henderson2012-10-201-32/+24
| | | | | | | No need to copy to a temporary to store 32 bits. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Avoid cpu_tmp32 in Read Priv RegisterRichard Henderson2012-10-201-32/+21
| | | | | | | | We don't need another temporary here. Load directly into the register we want to set. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use get_temp_i32 in gen_dest_fpr_FRichard Henderson2012-10-201-14/+14
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Split out get_temp_i32Richard Henderson2012-10-201-12/+17
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Make the cpu_addr variable local to load/store handlingRichard Henderson2012-10-201-11/+11
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Cleanup cpu_src[12] allocationRichard Henderson2012-10-201-9/+7
| | | | | | | | | | | Now that get_temp_tl is used for get_src[12], we don't need to pre-allocate these temporaries. Fallout from this is moving some assignments around cas/casx to avoid uninitialized variable warnings. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Finish conversion to gen_load_gprRichard Henderson2012-10-201-38/+20
| | | | | | | | All users of gen_movl_{reg_TN,TN_reg} are removed. At the same time, make cpu_val a local variable for load/store disassembly. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Convert swap to gen_load/store_gprRichard Henderson2012-10-201-8/+8
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Convert asi helpers to gen_*_gprRichard Henderson2012-10-201-29/+32
| | | | | | | | Push the DisasContext down so that we can use gen_load/store_gpr in sode gen_ldda_asi, gen_stda_ast, gen_cas_asi, gen_casx_asi. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use gen_load_gpr in get_src[12]Richard Henderson2012-10-201-46/+29
| | | | | | | | This means we can avoid the incoming temporary, though the cleanup of the existing temporaries is not performed in this patch. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Conversion to gen_*_gpr, part 1Richard Henderson2012-10-201-243/+177
| | | | | | | Only handle the easy cases directly within disas_sparc_insn. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Add gen_load/store/dest_gprRichard Henderson2012-10-201-0/+52
| | | | | | | Infrastructure to be used to clean up handling of temporaries. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Don't compute full flags value so oftenRichard Henderson2012-10-131-19/+11
| | | | | | | | | Avoid speculatively computing flags before every potentially trapping operation and instead do the flags computation when a trap actually occurs. This gives approximately 30% speedup in emulation. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Avoid unnecessary local temporariesRichard Henderson2012-10-131-21/+9
| | | | | | | | Now that save_state never ends a BB, we don't need to copy values into local temps around it. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Optimize CC_OP_LOGIC conditionsRichard Henderson2012-10-131-18/+40
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Fix optimized %icc comparisonsRichard Henderson2012-10-131-0/+1
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Optimize conditionals using SUBCCRichard Henderson2012-10-071-61/+131
| | | | | | | | | Aka "normal" comparisons. We now have the infrastructure to pass back non-boolean results from gen_compare. This will automatically get used by both branches and conditional moves. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Fall through from not-taken trapRichard Henderson2012-10-071-5/+7
| | | | | | | | Now that we've cleaned up global temporary allocation, we can continue translating the fallthru path of a conditional trap. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Cleanup "global" temporary allocationRichard Henderson2012-10-071-19/+19
| | | | | | | | | | | | There are 6 temporaries that disas_sparc_insn relies on having been allocated. Now that they are no longer referenced across branches, they need not be allocated as local temps. Move the allocation/free of these temporaries to make it clear that they are local to the translation of a single insn. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use movcond for FMOV*RRichard Henderson2012-10-071-30/+16
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use movcond in mulsccRichard Henderson2012-10-071-6/+5
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Move taddcctv and tsubcctv out of lineRichard Henderson2012-10-071-102/+6
| | | | | | | | | | The branches around the exception are maintaining an otherwise unnecessary use of local temps for the cpu destination. Note that gen_op_t{add,sub}_cc were identical to gen_op_{add,sub}_cc. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy TccRichard Henderson2012-10-071-38/+53
| | | | | | | | | | | | | Share more code between unconditional and conditional paths. Move the computation of the trap number into the conditional BB; avoid using temporaries that have gone out of scope (cpu_tmp32) or rely on local temps (cpu_dst). Fully fold the exception number when the trap number is %g0+imm. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Move sdivx and udivx out of lineRichard Henderson2012-10-071-50/+2
| | | | | | | | The branches around the exception are maintaining an otherwise unnecessary use of local temps for the cpu destination. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use movcond in gen_generic_branchRichard Henderson2012-10-071-11/+7
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use DisasCompare and movcond in MOVRRichard Henderson2012-10-071-17/+14
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use DisasCompare and movcond in MOVCCRichard Henderson2012-10-071-24/+20
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use DisasCompare and movcond in FMOVR, FMOVCCRichard Henderson2012-10-071-117/+86
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Use DisasCompare in TccRichard Henderson2012-10-071-9/+11
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Introduce DisasCompare and functions to generate itRichard Henderson2012-10-071-9/+83
| | | | | | | | For the moment gen_cond et al retain their existing interface, using setcond to turn a (potential) comparison back into a boolean. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy gen_generic_branch interfaceRichard Henderson2012-10-071-8/+7
| | | | | | | | The arguments passed are always the same. Pass down just DisasContext instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy save_npc interfaceRichard Henderson2012-10-071-4/+4
| | | | | | | Use the cpu_cond global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy gen_mov_pc_npc interfaceRichard Henderson2012-10-071-6/+6
| | | | | | | Use the cpu_cond global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy save_state interfaceRichard Henderson2012-10-071-49/+49
| | | | | | | Use the cpu_cond global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy gen_trap_ifnofpu interfaceRichard Henderson2012-10-071-18/+28
| | | | | | | | We always pass cpu_cond to the cond parameter. Use that global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy flush_cond interfaceRichard Henderson2012-10-071-5/+5
| | | | | | | | We always pass cpu_cond to the cond parameter. Use that global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Tidy do_branch interfacesRichard Henderson2012-10-071-20/+18
| | | | | | | | We always pass cpu_cond to the r_cond parameter. Use that global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson2012-09-271-1/+2
| | | | | | | | | | | For all targets that currently call tcg_gen_debug_insn_start, add CPU_LOG_TB_OP_OPT to the condition that gates it. This is useful for comparing optimization dumps, when the pre-optimization dump is merely noise. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Implement address masking for SPARC v9 CPUsArtyom Tarasenko2012-05-121-1/+24
| | | | | | | | | | | | According to UltraSPARC - IIi User's manual: 14.1.11 Address Masking (Impdep #125) When PSTATE.AM=1, the CALL, JMPL, and RDPC instructions and all traps transmit zero in the high-order 32-bits of the PC to their specified destination registers. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc: avoid AREG0 wrappers for memory access helpersBlue Swirl2012-03-181-4/+6
| | | | | | | | | Adjust generation of load and store templates so that the functions take a parameter for CPUState instead of relying on global env. Remove wrappers. Move remaining memory helpers to ldst_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Sparc: avoid AREG0 for memory access helpersBlue Swirl2012-03-181-25/+27
| | | | | | | Make memory access helpers take a parameter for CPUState instead of relying on global env. Introduce wrappers for load and store ops. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Don't overuse CPUStateAndreas Färber2012-03-141-40/+40
| | | | | | | | | Scripted conversion: sed -i "s/CPUState/CPUSPARCState/g" target-sparc/*.[hc] sed -i "s/#define CPUSPARCState/#define CPUState/" target-sparc/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
* Improve "ta 0" shutdownFabien Chouteau2011-11-191-8/+1
| | | | | | | | This patch replace the previous implementation with this simplified and more complete version (no shutdown when psret == 1). Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-sparc: Implement FALIGNDATA inline.Richard Henderson2011-10-261-6/+26
| | | | | | This is a relatively simple sequence of shifts. Signed-off-by: Richard Henderson <rth@twiddle.net>
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