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* target-sparc: Use DisasCompare and movcond in MOVCCRichard Henderson2012-10-071-24/+20
* target-sparc: Use DisasCompare and movcond in FMOVR, FMOVCCRichard Henderson2012-10-071-117/+86
* target-sparc: Use DisasCompare in TccRichard Henderson2012-10-071-9/+11
* target-sparc: Introduce DisasCompare and functions to generate itRichard Henderson2012-10-071-9/+83
* target-sparc: Tidy gen_generic_branch interfaceRichard Henderson2012-10-071-8/+7
* target-sparc: Tidy save_npc interfaceRichard Henderson2012-10-071-4/+4
* target-sparc: Tidy gen_mov_pc_npc interfaceRichard Henderson2012-10-071-6/+6
* target-sparc: Tidy save_state interfaceRichard Henderson2012-10-071-49/+49
* target-sparc: Tidy gen_trap_ifnofpu interfaceRichard Henderson2012-10-071-18/+28
* target-sparc: Tidy flush_cond interfaceRichard Henderson2012-10-071-5/+5
* target-sparc: Tidy do_branch interfacesRichard Henderson2012-10-071-20/+18
* Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson2012-09-271-1/+2
* Implement address masking for SPARC v9 CPUsArtyom Tarasenko2012-05-121-1/+24
* Sparc: avoid AREG0 wrappers for memory access helpersBlue Swirl2012-03-181-4/+6
* Sparc: avoid AREG0 for memory access helpersBlue Swirl2012-03-181-25/+27
* target-sparc: Don't overuse CPUStateAndreas Färber2012-03-141-40/+40
* Improve "ta 0" shutdownFabien Chouteau2011-11-191-8/+1
* target-sparc: Implement FALIGNDATA inline.Richard Henderson2011-10-261-6/+26
* target-sparc: Implement BMASK/BSHUFFLE.Richard Henderson2011-10-261-4/+10
* target-sparc: Implement ALIGNADDR* inline.Richard Henderson2011-10-261-2/+22
* target-sparc: Implement EDGE* instructions.Richard Henderson2011-10-261-2/+175
* target-sparc: Implement fpack{16,32,fix}.Richard Henderson2011-10-261-1/+29
* target-sparc: Implement PDIST.Richard Henderson2011-10-261-2/+19
* target-sparc: Do exceptions management fully inside the helpers.Richard Henderson2011-10-261-29/+0
* target-sparc: Change fpr representation to doubles.Richard Henderson2011-10-261-79/+71
* target-sparc: Undo cpu_fpr rename.Richard Henderson2011-10-261-28/+28
* target-sparc: Extract float128 move to a function.Richard Henderson2011-10-261-32/+18
* target-sparc: Extract common code for floating-point operations.Richard Henderson2011-10-261-454/+381
* target-sparc: Make FPU/VIS helpers const when possible.Richard Henderson2011-10-261-50/+33
* target-sparc: Pass float64 parameters instead of dt0/1 temporaries.Richard Henderson2011-10-261-229/+220
* target-sparc: Add accessors for double-precision fpr access.Richard Henderson2011-10-261-112/+130
* target-sparc: Mark fprs dirty in store accessor.Richard Henderson2011-10-261-46/+8
* target-sparc: Add accessors for single-precision fpr access.Richard Henderson2011-10-261-195/+337
* Sparc: avoid AREG0 for division op helpersBlue Swirl2011-10-261-4/+8
* Sparc: avoid AREG0 for softint op helpers and Leon cache controlBlue Swirl2011-10-261-3/+3
* Sparc: avoid AREG0 for CWP and PSTATE helpersBlue Swirl2011-10-261-17/+17
* target-sparc: Fix order of function parametersStefan Weil2011-10-251-4/+4
* Sparc: avoid AREG0 for lazy condition code helpersBlue Swirl2011-10-231-9/+9
* Sparc: avoid AREG0 for float and VIS opsBlue Swirl2011-10-231-133/+137
* Sparc: avoid AREG0 for raise_exception and helper_debugBlue Swirl2011-10-231-13/+13
* Fix handling of conditional branches in delay slot of a conditional branchArtyom Tarasenko2011-08-061-9/+21
* SPARC64: implement %fprs dirty bitsTsuneo Saito2011-07-301-0/+116
* SPARC64: fix fnor* and fnand*Tsuneo Saito2011-07-301-6/+8
* SPARC64: add missing break on fmovdccTsuneo Saito2011-07-201-0/+1
* SPARC64: fix VIS1 SIMD signed compare instructionsTsuneo Saito2011-07-201-16/+16
* Sparc: fix FPU and AM enable checks for translationBlue Swirl2011-07-141-7/+2
* SPARC64: fp_disabled checks on stfa/stdfa/stqfaTsuneo Saito2011-07-141-0/+9
* SPARC64: Implement stfa/stdfa/stqfa instrcutions properlyTsuneo Saito2011-07-141-2/+0
* SPARC64: fp_disabled checks on ldfa/lddfa/ldqfaTsuneo Saito2011-07-141-0/+9
* fix cpu_cc_src and cpu_cc_src2 corruption in udivx and sdivxArtyom Tarasenko2011-07-011-10/+22
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