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path: root/target-sparc/translate.c
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* Convert mulsccBlue Swirl2009-05-101-131/+2
* Convert udiv/sdivBlue Swirl2009-05-101-19/+6
* Convert tagged opsBlue Swirl2009-05-101-129/+8
* Convert subxBlue Swirl2009-05-101-31/+6
* Convert subBlue Swirl2009-05-101-37/+11
* Convert logical operations and umul/smulBlue Swirl2009-05-101-24/+24
* Convert addxBlue Swirl2009-05-101-31/+6
* Convert addBlue Swirl2009-05-101-21/+6
* Use dynamical computation for condition codesBlue Swirl2009-05-101-24/+108
* Optimize cmp x, 0 caseBlue Swirl2009-05-031-14/+19
* ReindentBlue Swirl2009-05-031-319/+312
* Improve instruction name comments for easier searchingBlue Swirl2009-05-021-44/+44
* Optimize operations with immediate parametersBlue Swirl2009-05-021-52/+200
* Fix Sparc64 sign extension problemsBlue Swirl2009-05-021-32/+36
* Add new command line option -singlestep for tcg single stepping.aurel322009-04-051-1/+1
* Delete some unused macros detected with -Wp,-Wunused-macros useblueswir12009-03-161-20/+0
* global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori2009-01-151-2/+2
* Convert references to logfile/loglevel to use qemu_log*() macrosaliguori2009-01-151-9/+6
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
* Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori2008-11-251-2/+2
* Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori2008-11-181-3/+4
* TCG variable type checking.pbrook2008-11-171-523/+521
* Use TCG not opblueswir12008-11-091-14/+12
* Use andc, orc, nor and nandblueswir12008-11-091-52/+36
* Fix TCGv size mismatchesblueswir12008-11-011-19/+21
* Implement UA2005 hypervisor trapsblueswir12008-09-261-2/+23
* Add software and timer interrupt supportblueswir12008-09-221-5/+29
* Use the new concat_tl_i64 op for std and stdablueswir12008-09-211-18/+6
* Use the new concat_i32_i64 op for std and stdablueswir12008-09-211-16/+20
* Fix mulscc with high bits set in either src1 or src2blueswir12008-09-131-2/+3
* Write zeros to high bits of y, based on patch by Vince Weaverblueswir12008-09-111-2/+4
* Convert rest of ops using float32 to TCG, remove FT0 and FT1blueswir12008-09-101-35/+16
* Partially convert float128 conversion ops to TCGblueswir12008-09-101-8/+6
* Convert basic 64 bit VIS ops to TCGblueswir12008-09-101-46/+65
* Convert basic 32 bit VIS ops to TCGblueswir12008-09-101-76/+38
* Convert basic float32 ops to TCGblueswir12008-09-101-150/+247
* Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCGblueswir12008-09-091-8/+23
* Fix a typo in fpsub32blueswir12008-09-061-1/+1
* Convert most env fields to TCG registersblueswir12008-09-061-95/+91
* Silence gcc warning about constant overflowblueswir12008-09-061-2/+2
* Fix sign extension problems with smul and umul (Vince Weaver)blueswir12008-09-021-4/+4
* Fix y register loads and storesblueswir12008-09-011-18/+16
* Fix FCC handling for Sparc64 target, initial patch by Vince Weaverblueswir12008-08-291-4/+2
* Fix wrwim masking (Luis Pureza)blueswir12008-08-211-0/+3
* Use initial CPU definition structure for some CPU fields instead of copyingblueswir12008-08-211-10/+7
* Correct 32bit carry flag for add instruction (Igor Kovalenko)blueswir12008-08-171-5/+8
* Fix Sparc64 shiftsblueswir12008-08-061-5/+3
* Fix offset handling for ASI loads and stores (Vince Weaver)blueswir12008-08-061-3/+1
* Fix cmp/subcc/addcc op bugs reported by Vince Weaverblueswir12008-07-291-4/+4
* Make UA200x features selectable, add MMU typesblueswir12008-07-201-0/+6
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